Abstract
MRAM-writing circuitry to compensate for the thermal variation of the magnetization-reversal current (MRC) is proposed. The writing current of the proposed circuitry is designed to decrease in proportion to an increase in temperature. This technique prevents multiple-write (MW) failures from degrading 1Gb MRAM yield where the standard deviation of MRC variation from other origins is less than 5%.
| Original language | English |
|---|---|
| Pages | 156-157 |
| Number of pages | 2 |
| Publication status | Published - 2002 Dec 1 |
| Externally published | Yes |
| Event | 2002 Symposium on VLSI Circuits Digest of Technical Papers - Honolulu, HI, United States Duration: 2002 Jun 13 → 2002 Jun 15 |
Other
| Other | 2002 Symposium on VLSI Circuits Digest of Technical Papers |
|---|---|
| Country/Territory | United States |
| City | Honolulu, HI |
| Period | 02/6/13 → 02/6/15 |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering