Monolithic integration of pseudo-spin-MOSFETs using a custom CMOS chip fabricated through multi-project wafer service

R. Nakane, Y. Shuto, H. Sukegawa, Z. C. Wen, S. Yamamoto, S. Mitani, M. Tanaka, K. Inomata, S. Sugahara

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    2 Citations (Scopus)

    Abstract

    We demonstrated monolithic integration of pseudo-spin-MOSFETs (PS-MOSFETs) using vendor-made MOSFETs fabricated in a low-cost multi-project wafer (MPW) product and lab-made magnetic tunnel junctions (MTJs) formed on the topmost passivation film of the MPW chip. The tunneling magnetoresistance (TMR) ratio of the fabricated MTJs strongly depended on the surface roughness of the passivation film. Nevertheless, after the chip surface was atomically flattened by SiO2 deposition and successive chemical-mechanical polish (CMP) process, the fabricated MTJs on the surface exhibited a sufficiently large TMR ratio (≥ 140 %) adaptable to the PS-MOSFET application. The implemented PS-MOSFETs showed clear modulation of the output current controlled by the magnetization configuration of the MTJs, and a maximum magnetocurrent ratio of 90 % was achieved. These magnetocurrent behaviors were quantitatively consistent with those predicted by HSPICE simulations. The developed integration technique using a MPW CMOS chip would also be applied to monolithic integration of CMOS devices/circuits and other various functional devices/materials, which would open the door for exploring CMOS-based new functional hybrid circuits.

    Original languageEnglish
    Title of host publicationESSDERC 2013 - Proceedings of the 43rd European Solid-State Device Research Conference
    PublisherIEEE Computer Society
    Pages272-275
    Number of pages4
    ISBN (Print)9781479906499
    DOIs
    Publication statusPublished - 2013
    Event43rd European Solid-State Device Research Conference, ESSDERC 2013 - Bucharest, Romania
    Duration: 2013 Sep 162013 Sep 20

    Publication series

    NameEuropean Solid-State Device Research Conference
    ISSN (Print)1930-8876

    Conference

    Conference43rd European Solid-State Device Research Conference, ESSDERC 2013
    Country/TerritoryRomania
    CityBucharest
    Period13/9/1613/9/20

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering
    • Safety, Risk, Reliability and Quality

    Fingerprint

    Dive into the research topics of 'Monolithic integration of pseudo-spin-MOSFETs using a custom CMOS chip fabricated through multi-project wafer service'. Together they form a unique fingerprint.

    Cite this