Modular design of multiple-valued arithmetic VLSI system using signed-digit number system

Michitaka Kameyama, Masahiro Nomura, Tatsuo Higuchi

Research output: Contribution to journalConference article

11 Citations (Scopus)

Abstract

A modular arithmetic circuit using a radix-4 minimum-redundant signed-digit (SD) number system is proposed. Any arithmetic circuit can be constructed using a single kind of module with a high degree of parallelism. This modularity is very useful for realizing high-performance semicustom VLSI such as a data-driven arithmetic circuit. The module is composed of an adder, a partial product generator, and a quotient digit generator, which are mainly implemented by multiple-valued bidirectional current-mode circuits. It is easy to design any complex arithmetic circuit using the modules. A performance estimation using SPICE simulation shows that the speed of the proposed arithmetic circuits is comparable to that of the fastest binary circuits.

Original languageEnglish
Pages (from-to)355-362
Number of pages8
JournalProceedings of The International Symposium on Multiple-Valued Logic
Publication statusPublished - 1990 Dec 1
EventProceedings of the 20th International Symposium on Multiple-Valued Logic - Charlotte, NC, USA
Duration: 1990 May 231990 May 25

ASJC Scopus subject areas

  • Computer Science(all)
  • Mathematics(all)

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