On-chip transmission lines are widely used in ultrahighfrequency integrated circuits. One of the issues in modeling such transmission lines is that no reference impedance can be established on a chip. Conventionally, the parallel admittance Yp has been adopted as a reference parameter for on-chip transmission lines instead of a reference characteristic impedance of 50Ω. In the case of CMOS processes, however, Yp can have complicated characteristics in the short-millimeter-wave band owing to the frequency characteristics of the electric permittivity of low-k materials, which cannot be expressed using a simple circuit. To solve this problem, we propose the use of the series impedance Zs as a reference parameter for transmission-line modeling since it basically can be determined from the geometrical dimensions and the frequency-stable permeability and resistivity. The parameters of transmission lines obtained by the proposed method were compared with those obtained by conventional methods using a 40 nm CMOS process. By using the equivalent circuit model of Yp along with RLC resonators, it is shown that the peaks of the frequency characteristics of Yp can be used to explain the absorption spectrum of the dielectric. This suggests that the proposed method is suitable for CMOS short-millimeter-wave transmission lines.
- Lossy dielectrics
- Short-millimeter wave
- Transmission line
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering