Modeling and analysis of self-heating in FinFET devices for improved circuit and EOS/ESD performance

Seshadri Kolluri; Kazuhiko Endo; Eiichi Suzuki; Kaustav Banerjee

doi:10.1109/IEDM.2007.4418895

Modeling and analysis of self-heating in FinFET devices for improved circuit and EOS/ESD performance

Seshadri Kolluri, Kazuhiko Endo, Eiichi Suzuki, Kaustav Banerjee

Research output: Contribution to journal › Conference article

39 Citations (Scopus)

Abstract

A rigorous analytical thermal model has been formulated for the analysis of self-heating effects in FinFETs, under both steady-state and transient stress conditions. 3-D self-consistent electrothermal simulations, calibrated with experimentally measured electrical characteristics, were used to understand the nature of self-heating in FinFETs and calibrate the proposed model. The accuracy of the model has been demonstrated for a wide range of multi-fin devices, by comparing against finite element simulations. The model has been applied to carry out a detailed sensitivity analysis of self-heating with respect to various FinFET parameters and structures which are critical for improving circuit performance and EOS/ESD reliability. The transient model has been used to estimate the thermal time constants of these devices and predict the sensitivity of power-to-failure to various device parameters, for both long and short pulse ESD situations.

Original language	English
Article number	4418895
Pages (from-to)	177-180
Number of pages	4
Journal	Technical Digest - International Electron Devices Meeting, IEDM
DOIs	https://doi.org/10.1109/IEDM.2007.4418895
Publication status	Published - 2007 Dec 1
Externally published	Yes
Event	2007 IEEE International Electron Devices Meeting, IEDM - Washington, DC, United States Duration: 2007 Dec 10 → 2007 Dec 12

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

Access to Document

10.1109/IEDM.2007.4418895

Fingerprint Dive into the research topics of 'Modeling and analysis of self-heating in FinFET devices for improved circuit and EOS/ESD performance'. Together they form a unique fingerprint.

Cite this

Kolluri, S., Endo, K., Suzuki, E., & Banerjee, K. (2007). Modeling and analysis of self-heating in FinFET devices for improved circuit and EOS/ESD performance. Technical Digest - International Electron Devices Meeting, IEDM, 177-180. [4418895]. https://doi.org/10.1109/IEDM.2007.4418895

@article{a9d8b98d07994f469c73d0e3e748bbde,

title = "Modeling and analysis of self-heating in FinFET devices for improved circuit and EOS/ESD performance",

abstract = "A rigorous analytical thermal model has been formulated for the analysis of self-heating effects in FinFETs, under both steady-state and transient stress conditions. 3-D self-consistent electrothermal simulations, calibrated with experimentally measured electrical characteristics, were used to understand the nature of self-heating in FinFETs and calibrate the proposed model. The accuracy of the model has been demonstrated for a wide range of multi-fin devices, by comparing against finite element simulations. The model has been applied to carry out a detailed sensitivity analysis of self-heating with respect to various FinFET parameters and structures which are critical for improving circuit performance and EOS/ESD reliability. The transient model has been used to estimate the thermal time constants of these devices and predict the sensitivity of power-to-failure to various device parameters, for both long and short pulse ESD situations.",

author = "Seshadri Kolluri and Kazuhiko Endo and Eiichi Suzuki and Kaustav Banerjee",

year = "2007",

month = dec,

day = "1",

doi = "10.1109/IEDM.2007.4418895",

language = "English",

pages = "177--180",

journal = "Technical Digest - International Electron Devices Meeting",

issn = "0163-1918",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2007 IEEE International Electron Devices Meeting, IEDM ; Conference date: 10-12-2007 Through 12-12-2007",

}

TY - JOUR

T1 - Modeling and analysis of self-heating in FinFET devices for improved circuit and EOS/ESD performance

AU - Kolluri, Seshadri

AU - Endo, Kazuhiko

AU - Suzuki, Eiichi

AU - Banerjee, Kaustav

PY - 2007/12/1

Y1 - 2007/12/1

N2 - A rigorous analytical thermal model has been formulated for the analysis of self-heating effects in FinFETs, under both steady-state and transient stress conditions. 3-D self-consistent electrothermal simulations, calibrated with experimentally measured electrical characteristics, were used to understand the nature of self-heating in FinFETs and calibrate the proposed model. The accuracy of the model has been demonstrated for a wide range of multi-fin devices, by comparing against finite element simulations. The model has been applied to carry out a detailed sensitivity analysis of self-heating with respect to various FinFET parameters and structures which are critical for improving circuit performance and EOS/ESD reliability. The transient model has been used to estimate the thermal time constants of these devices and predict the sensitivity of power-to-failure to various device parameters, for both long and short pulse ESD situations.

AB - A rigorous analytical thermal model has been formulated for the analysis of self-heating effects in FinFETs, under both steady-state and transient stress conditions. 3-D self-consistent electrothermal simulations, calibrated with experimentally measured electrical characteristics, were used to understand the nature of self-heating in FinFETs and calibrate the proposed model. The accuracy of the model has been demonstrated for a wide range of multi-fin devices, by comparing against finite element simulations. The model has been applied to carry out a detailed sensitivity analysis of self-heating with respect to various FinFET parameters and structures which are critical for improving circuit performance and EOS/ESD reliability. The transient model has been used to estimate the thermal time constants of these devices and predict the sensitivity of power-to-failure to various device parameters, for both long and short pulse ESD situations.

UR - http://www.scopus.com/inward/record.url?scp=50249095149&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=50249095149&partnerID=8YFLogxK

U2 - 10.1109/IEDM.2007.4418895

DO - 10.1109/IEDM.2007.4418895

M3 - Conference article

AN - SCOPUS:50249095149

SP - 177

EP - 180

JO - Technical Digest - International Electron Devices Meeting

JF - Technical Digest - International Electron Devices Meeting

SN - 0163-1918

M1 - 4418895

T2 - 2007 IEEE International Electron Devices Meeting, IEDM

Y2 - 10 December 2007 through 12 December 2007

ER -