Minimization of residual stress in TSV interconnections by controlling their crystallinity

Jiatong Liu; Takeru Kato; Ken Suzuki; Hideo Miura

doi:10.1109/ITHERM.2016.7517528

Minimization of residual stress in TSV interconnections by controlling their crystallinity

Jiatong Liu, Takeru Kato, Ken Suzuki, Hideo Miura

ENG - Fracture and Reliability Research Institute

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

The crystallinity of electroplated copper thin-film interconnections varies drastically depending on its manufacturing process, and thus, their mechanical and electrical properties change significantly depending on their micro texture. These changes should cause the variation of the residual stress in the interconnections, and thus, electronic performance of devices and the lifetime of interconnections should vary depending on the amplitude of the residual stress around TSV structures. The main reasons for high residual stress is attributed to not only thermal stress but also the shrinkage of the interconnections during their thermal history. Since the crystallinity of the interconnections varies drastically depending on their electroplating process, the residual stress after high temperature annealing is a strong function of the crystallinity. In this paper, the dominant process factors for changing the crystallinity and the residual stress in the electroplated interconnections were investigated by varying the electroplating process parameters systematically. Finally, it was found that the control of the crystallinity of a seed layer material used for the electroplating is the most important factor for controlling the crystallinity and long-term reliability of thin electroplated interconnections.

Original language	English
Title of host publication	Proceedings of the 15th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2016
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	58-63
Number of pages	6
ISBN (Electronic)	9781467381215
DOIs	https://doi.org/10.1109/ITHERM.2016.7517528
Publication status	Published - 2016 Jul 20
Event	15th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2016 - Las Vegas, United States Duration: 2016 May 31 → 2016 Jun 3

Publication series

Name	Proceedings of the 15th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2016

Other

Other	15th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2016
Country	United States
City	Las Vegas
Period	16/5/31 → 16/6/3

Keywords

Atomic diffusion
EBSD analysis
Electroplated copper
Grain boundary
Lattice mismatch
Mechanical properties
Micro texture

ASJC Scopus subject areas

Fluid Flow and Transfer Processes
Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials
Hardware and Architecture
Mechanics of Materials

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Liu, J., Kato, T., Suzuki, K., & Miura, H. (2016). Minimization of residual stress in TSV interconnections by controlling their crystallinity. In Proceedings of the 15th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2016 (pp. 58-63). [7517528] (Proceedings of the 15th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2016). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ITHERM.2016.7517528

Minimization of residual stress in TSV interconnections by controlling their crystallinity. / Liu, Jiatong; Kato, Takeru; Suzuki, Ken ; Miura, Hideo.

Proceedings of the 15th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2016. Institute of Electrical and Electronics Engineers Inc., 2016. p. 58-63 7517528 (Proceedings of the 15th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2016).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Liu, J, Kato, T, Suzuki, K & Miura, H 2016, Minimization of residual stress in TSV interconnections by controlling their crystallinity. in Proceedings of the 15th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2016., 7517528, Proceedings of the 15th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2016, Institute of Electrical and Electronics Engineers Inc., pp. 58-63, 15th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2016, Las Vegas, United States, 16/5/31. https://doi.org/10.1109/ITHERM.2016.7517528

Liu J, Kato T, Suzuki K , Miura H. Minimization of residual stress in TSV interconnections by controlling their crystallinity. In Proceedings of the 15th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2016. Institute of Electrical and Electronics Engineers Inc. 2016. p. 58-63. 7517528. (Proceedings of the 15th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2016). https://doi.org/10.1109/ITHERM.2016.7517528

Liu, Jiatong ; Kato, Takeru ; Suzuki, Ken ; Miura, Hideo. / Minimization of residual stress in TSV interconnections by controlling their crystallinity. Proceedings of the 15th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2016. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 58-63 (Proceedings of the 15th InterSociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems, ITherm 2016).

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keywords = "Atomic diffusion, EBSD analysis, Electroplated copper, Grain boundary, Lattice mismatch, Mechanical properties, Micro texture",

author = "Jiatong Liu and Takeru Kato and Ken Suzuki and Hideo Miura",

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AB - The crystallinity of electroplated copper thin-film interconnections varies drastically depending on its manufacturing process, and thus, their mechanical and electrical properties change significantly depending on their micro texture. These changes should cause the variation of the residual stress in the interconnections, and thus, electronic performance of devices and the lifetime of interconnections should vary depending on the amplitude of the residual stress around TSV structures. The main reasons for high residual stress is attributed to not only thermal stress but also the shrinkage of the interconnections during their thermal history. Since the crystallinity of the interconnections varies drastically depending on their electroplating process, the residual stress after high temperature annealing is a strong function of the crystallinity. In this paper, the dominant process factors for changing the crystallinity and the residual stress in the electroplated interconnections were investigated by varying the electroplating process parameters systematically. Finally, it was found that the control of the crystallinity of a seed layer material used for the electroplating is the most important factor for controlling the crystallinity and long-term reliability of thin electroplated interconnections.

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KW - Micro texture

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