Mechanical stress simulation during gate formation of MOS devices considering crystallization-induced stress of phosphorus-doped silicon thin films

Hideo Miura, Naoto Saito, Noriaki Okamoto

Research output: Contribution to journalArticle

5 Citations (Scopus)

Abstract

Mechanical stress in silicon substrates, caused by thin-film deposition of gate material of MOS transistors, is analysed by the finite element method. The internal stress change of the thin film due to crystallization during high temperature annealing is taken into account in the stress analysis. The results reveal that it is very important to design and control mechanical stress at the gate edges, which is caused not only by thermal stress but also by internal stress of the gate materials, in order to eliminate dislocations at gate edges and to improve device reliability.

Original languageEnglish
Pages (from-to)249-253
Number of pages5
JournalMicroelectronics Journal
Volume26
Issue number2-3
DOIs
Publication statusPublished - 1995 Jan 1
Externally publishedYes

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials
  • Surfaces, Coatings and Films
  • Condensed Matter Physics
  • Atomic and Molecular Physics, and Optics
  • Control and Systems Engineering

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