Low-sensitivity design and implementation of allpass based fractional delay digital filters

Kamelia Nikolova, Georgi Stoyanov, Masayuki Kawamata

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

A low-sensitivity design and implementation of allpass structures based fractional delay (FD) filters is proposed in this paper. It is based on a phase-sensitivity minimization of each individual first- and second-order allpass section in the filter cascade realization depending on its transfer function (TF) poles position. It is shown that the poles of the FD TFs are taking positions not typical for the conventional filters and there is no second-order allpass sections providing low sensitivity for these positions. A new second order allpass section, suitable for such design, is proposed and compared with the other known second-order sections. The design procedure is verified experimentally. The overall sensitivity of the properly designed FD filter is considerably decreased, permitting thus a severe multiplier coefficient quantization and efficient multiplierless implementation.

Original languageEnglish
Title of host publicationECCTD 2009 - European Conference on Circuit Theory and Design Conference Program
Pages603-606
Number of pages4
DOIs
Publication statusPublished - 2009 Dec 10
EventECCTD 2009 - European Conference on Circuit Theory and Design Conference Program - Antalya, Turkey
Duration: 2009 Aug 232009 Aug 27

Publication series

NameECCTD 2009 - European Conference on Circuit Theory and Design Conference Program

Other

OtherECCTD 2009 - European Conference on Circuit Theory and Design Conference Program
CountryTurkey
CityAntalya
Period09/8/2309/8/27

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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