Low resistive and highly reliable Cu dual-damascene interconnect technology using self-formed mnSi xO y barrier layer

T. Usui, H. Nasu, J. Koike, M. Wada, S. Takahashi, N. Shimizu, T. Nishikawa, M. Yoshimaru, H. Shibata

Research output: Chapter in Book/Report/Conference proceedingConference contribution

14 Citations (Scopus)

Abstract

Copper (Cu) dual damascene interconnects with self-formed MnSi xO y barrier layer using Cu-Manganese (Mn) alloy seed layer is successfully fabricated for the first time. No delamination is found in the chemical mechanical polishing process probably because of better adhesion strength between MnSi xO y barrier and dielectric. More than 90% yield is obtained for 1 million via chain. Microstructure analysis by transmission electron microscopy shows that an approximately 2nm thick and continuous MnSi xO y layer is formed at the interface between Cu and dielectric of the via and trench and that no barrier at the via bottom. This via structure without the bottom barrier provides essential advantages of reducing via resistance, significant via-electromigration lifetime improvement due to no flux divergence site at the via and excellent stress-induced voiding performance.

Original languageEnglish
Title of host publicationProceedings of the IEEE 2005 International Interconnect Technology Conference, IITC
Pages188-190
Number of pages3
Publication statusPublished - 2005 Dec 7
EventIEEE 2005 International Interconnect Technology Conference, IITC - Burlingame, CA, United States
Duration: 2005 Jun 62005 Jun 8

Publication series

NameProceedings of the IEEE 2005 International Interconnect Technology Conference, IITC

Other

OtherIEEE 2005 International Interconnect Technology Conference, IITC
CountryUnited States
CityBurlingame, CA
Period05/6/605/6/8

ASJC Scopus subject areas

  • Engineering(all)

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