TY - GEN
T1 - Low resistive and highly reliable Cu dual-damascene interconnect technology using self-formed mnSi xO y barrier layer
AU - Usui, T.
AU - Nasu, H.
AU - Koike, J.
AU - Wada, M.
AU - Takahashi, S.
AU - Shimizu, N.
AU - Nishikawa, T.
AU - Yoshimaru, M.
AU - Shibata, H.
PY - 2005/12/7
Y1 - 2005/12/7
N2 - Copper (Cu) dual damascene interconnects with self-formed MnSi xO y barrier layer using Cu-Manganese (Mn) alloy seed layer is successfully fabricated for the first time. No delamination is found in the chemical mechanical polishing process probably because of better adhesion strength between MnSi xO y barrier and dielectric. More than 90% yield is obtained for 1 million via chain. Microstructure analysis by transmission electron microscopy shows that an approximately 2nm thick and continuous MnSi xO y layer is formed at the interface between Cu and dielectric of the via and trench and that no barrier at the via bottom. This via structure without the bottom barrier provides essential advantages of reducing via resistance, significant via-electromigration lifetime improvement due to no flux divergence site at the via and excellent stress-induced voiding performance.
AB - Copper (Cu) dual damascene interconnects with self-formed MnSi xO y barrier layer using Cu-Manganese (Mn) alloy seed layer is successfully fabricated for the first time. No delamination is found in the chemical mechanical polishing process probably because of better adhesion strength between MnSi xO y barrier and dielectric. More than 90% yield is obtained for 1 million via chain. Microstructure analysis by transmission electron microscopy shows that an approximately 2nm thick and continuous MnSi xO y layer is formed at the interface between Cu and dielectric of the via and trench and that no barrier at the via bottom. This via structure without the bottom barrier provides essential advantages of reducing via resistance, significant via-electromigration lifetime improvement due to no flux divergence site at the via and excellent stress-induced voiding performance.
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M3 - Conference contribution
AN - SCOPUS:28244497744
SN - 078038752X
SN - 9780780387522
T3 - Proceedings of the IEEE 2005 International Interconnect Technology Conference, IITC
SP - 188
EP - 190
BT - Proceedings of the IEEE 2005 International Interconnect Technology Conference, IITC
T2 - IEEE 2005 International Interconnect Technology Conference, IITC
Y2 - 6 June 2005 through 8 June 2005
ER -