Low-power multiple-valued reconfigurable VLSI based on superposition of bit-serial data and current-source control signals

Akitaka Ishikawa; Nobuaki Okada; Michitaka Kameyama

doi:10.1109/ISMVL.2010.41

Low-power multiple-valued reconfigurable VLSI based on superposition of bit-serial data and current-source control signals

Akitaka Ishikawa, Nobuaki Okada, Michitaka Kameyama

INF - Computer and Mathematical Sciences

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

7 Citations (Scopus)

Abstract

A bit-serial multiple-valued reconfigurable VLSI using current-mode logic circuits has been proposed. A Differential-Pair Circuit (DPC) is used as a basic component of a cell, so that the static power is dissipated even in the nonactive cells. To solve the problem, autonomous ON/OFF control of the current sources is presented based on superposition of bit-serial data and current-source control signals. In the proposed switched current control technique, the static power dissipation can be greatly reduced because current sources in nonactive circuit blocks are turned off. The superposition of data and control signals in a single interconnection is effectively utilized to reduce complexity of switches and interconnections, and to eliminate skew between data and control signals. It is evaluated that the reduction of the power dissipation is remarkable, if the operating ratio is less than 75%.

Original language	English
Title of host publication	ISMVL 2010 - 40th IEEE International Symposium on Multiple-Valued Logic
Pages	179-184
Number of pages	6
DOIs	https://doi.org/10.1109/ISMVL.2010.41
Publication status	Published - 2010 Aug 12
Event	40th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2010 - Barcelona, Spain Duration: 2010 May 26 → 2010 May 28

Publication series

Name	Proceedings of The International Symposium on Multiple-Valued Logic
ISSN (Print)	0195-623X

Other

Other	40th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2010
Country	Spain
City	Barcelona
Period	10/5/26 → 10/5/28

ASJC Scopus subject areas

Computer Science(all)
Mathematics(all)

Access to Document

10.1109/ISMVL.2010.41

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Ishikawa, A., Okada, N., & Kameyama, M. (2010). Low-power multiple-valued reconfigurable VLSI based on superposition of bit-serial data and current-source control signals. In ISMVL 2010 - 40th IEEE International Symposium on Multiple-Valued Logic (pp. 179-184). [5489119] (Proceedings of The International Symposium on Multiple-Valued Logic). https://doi.org/10.1109/ISMVL.2010.41

Low-power multiple-valued reconfigurable VLSI based on superposition of bit-serial data and current-source control signals. / Ishikawa, Akitaka; Okada, Nobuaki; Kameyama, Michitaka.

ISMVL 2010 - 40th IEEE International Symposium on Multiple-Valued Logic. 2010. p. 179-184 5489119 (Proceedings of The International Symposium on Multiple-Valued Logic).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Ishikawa, A, Okada, N & Kameyama, M 2010, Low-power multiple-valued reconfigurable VLSI based on superposition of bit-serial data and current-source control signals. in ISMVL 2010 - 40th IEEE International Symposium on Multiple-Valued Logic., 5489119, Proceedings of The International Symposium on Multiple-Valued Logic, pp. 179-184, 40th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2010, Barcelona, Spain, 10/5/26. https://doi.org/10.1109/ISMVL.2010.41

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