Low phase noise ku-band PLL-IC with -104.5dBc/Hz at 10kHz offset using SiGe HBT ECL PFD

Koji Tsutsumi; Masahiko Komaki; Mitsuhiro Shimozawa; Noriharu Suematsu

doi:10.1109/APMC.2009.5384526

Low phase noise ku-band PLL-IC with -104.5dBc/Hz at 10kHz offset using SiGe HBT ECL PFD

Koji Tsutsumi, Masahiko Komaki, Mitsuhiro Shimozawa, Noriharu Suematsu

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

6 Citations (Scopus)

Abstract

This paper describes one of the lowest phase noise Ku-band PLL-IC below 10kHz offset region using 0.18μm SiGe-BiCMOS process. Since the phase frequency detector (PFD) generates the major portion of phase noise of total PLL in low offset frequency region, SiGe HBT emitter coupled logic (ECL) circuit is employed to reduce 1/f noise of the PFD. The fabricated PLL-IC achieves in-band phase noise of -104.5dBc/Hz at 10 kHz offset in Ku-band. The calculated FOM (Figure of Merit) of -227.7dBc/Hz² is the lowest value among the reported PLL-ICs at 10 kHz offset.

Original language	English
Title of host publication	APMC 2009 - Asia Pacific Microwave Conference 2009
Pages	373-376
Number of pages	4
DOIs	https://doi.org/10.1109/APMC.2009.5384526
Publication status	Published - 2009 Dec 1
Externally published	Yes
Event	Asia Pacific Microwave Conference 2009, APMC 2009 - Singapore, Singapore Duration: 2009 Dec 7 → 2009 Dec 10

Publication series

Name	APMC 2009 - Asia Pacific Microwave Conference 2009

Other

Other	Asia Pacific Microwave Conference 2009, APMC 2009
Country/Territory	Singapore
City	Singapore
Period	09/12/7 → 09/12/10

Keywords

1/f noise
Emitter coupled logic
Flicker noise
Phase frequency detector
Phase locked loop

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/APMC.2009.5384526

Cite this

Low phase noise ku-band PLL-IC with -104.5dBc/Hz at 10kHz offset using SiGe HBT ECL PFD. / Tsutsumi, Koji; Komaki, Masahiko; Shimozawa, Mitsuhiro et al.

APMC 2009 - Asia Pacific Microwave Conference 2009. 2009. p. 373-376 5384526 (APMC 2009 - Asia Pacific Microwave Conference 2009).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Tsutsumi, K, Komaki, M, Shimozawa, M & Suematsu, N 2009, Low phase noise ku-band PLL-IC with -104.5dBc/Hz at 10kHz offset using SiGe HBT ECL PFD. in APMC 2009 - Asia Pacific Microwave Conference 2009., 5384526, APMC 2009 - Asia Pacific Microwave Conference 2009, pp. 373-376, Asia Pacific Microwave Conference 2009, APMC 2009, Singapore, Singapore, 09/12/7. https://doi.org/10.1109/APMC.2009.5384526

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title = "Low phase noise ku-band PLL-IC with -104.5dBc/Hz at 10kHz offset using SiGe HBT ECL PFD",

abstract = "This paper describes one of the lowest phase noise Ku-band PLL-IC below 10kHz offset region using 0.18μm SiGe-BiCMOS process. Since the phase frequency detector (PFD) generates the major portion of phase noise of total PLL in low offset frequency region, SiGe HBT emitter coupled logic (ECL) circuit is employed to reduce 1/f noise of the PFD. The fabricated PLL-IC achieves in-band phase noise of -104.5dBc/Hz at 10 kHz offset in Ku-band. The calculated FOM (Figure of Merit) of -227.7dBc/Hz2 is the lowest value among the reported PLL-ICs at 10 kHz offset.",

keywords = "1/f noise, Emitter coupled logic, Flicker noise, Phase frequency detector, Phase locked loop",

author = "Koji Tsutsumi and Masahiko Komaki and Mitsuhiro Shimozawa and Noriharu Suematsu",

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AU - Shimozawa, Mitsuhiro

AU - Suematsu, Noriharu

PY - 2009/12/1

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N2 - This paper describes one of the lowest phase noise Ku-band PLL-IC below 10kHz offset region using 0.18μm SiGe-BiCMOS process. Since the phase frequency detector (PFD) generates the major portion of phase noise of total PLL in low offset frequency region, SiGe HBT emitter coupled logic (ECL) circuit is employed to reduce 1/f noise of the PFD. The fabricated PLL-IC achieves in-band phase noise of -104.5dBc/Hz at 10 kHz offset in Ku-band. The calculated FOM (Figure of Merit) of -227.7dBc/Hz2 is the lowest value among the reported PLL-ICs at 10 kHz offset.

AB - This paper describes one of the lowest phase noise Ku-band PLL-IC below 10kHz offset region using 0.18μm SiGe-BiCMOS process. Since the phase frequency detector (PFD) generates the major portion of phase noise of total PLL in low offset frequency region, SiGe HBT emitter coupled logic (ECL) circuit is employed to reduce 1/f noise of the PFD. The fabricated PLL-IC achieves in-band phase noise of -104.5dBc/Hz at 10 kHz offset in Ku-band. The calculated FOM (Figure of Merit) of -227.7dBc/Hz2 is the lowest value among the reported PLL-ICs at 10 kHz offset.

KW - 1/f noise

KW - Emitter coupled logic

KW - Flicker noise

KW - Phase frequency detector

KW - Phase locked loop

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Low phase noise ku-band PLL-IC with -104.5dBc/Hz at 10kHz offset using SiGe HBT ECL PFD

Abstract

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Keywords

ASJC Scopus subject areas

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