Low phase noise ku-band PLL-IC with -104.5dBc/Hz at 10kHz offset using SiGe HBT ECL PFD

Koji Tsutsumi, Masahiko Komaki, Mitsuhiro Shimozawa, Noriharu Suematsu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

This paper describes one of the lowest phase noise Ku-band PLL-IC below 10kHz offset region using 0.18μm SiGe-BiCMOS process. Since the phase frequency detector (PFD) generates the major portion of phase noise of total PLL in low offset frequency region, SiGe HBT emitter coupled logic (ECL) circuit is employed to reduce 1/f noise of the PFD. The fabricated PLL-IC achieves in-band phase noise of -104.5dBc/Hz at 10 kHz offset in Ku-band. The calculated FOM (Figure of Merit) of -227.7dBc/Hz2 is the lowest value among the reported PLL-ICs at 10 kHz offset.

Original languageEnglish
Title of host publicationAPMC 2009 - Asia Pacific Microwave Conference 2009
Pages373-376
Number of pages4
DOIs
Publication statusPublished - 2009 Dec 1
Externally publishedYes
EventAsia Pacific Microwave Conference 2009, APMC 2009 - Singapore, Singapore
Duration: 2009 Dec 72009 Dec 10

Publication series

NameAPMC 2009 - Asia Pacific Microwave Conference 2009

Other

OtherAsia Pacific Microwave Conference 2009, APMC 2009
CountrySingapore
CitySingapore
Period09/12/709/12/10

Keywords

  • 1/f noise
  • Emitter coupled logic
  • Flicker noise
  • Phase frequency detector
  • Phase locked loop

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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