Abstract
We have developed a new interlayer technology that attain 50% reduction in capacitance and keep good process compatibility with current Chemical Mechanical Polishing (CMP) based multi-level metallization (MLM) process. This technology uses fluorinated amorphous carbon (a-C:F) with a dielectric constant of 2.3, sandwiched between layers of SiO2, which are formed in sequential by high density plasma-chemical vapor deposition (HDP-CVD) technique. Top SiO2 layer assures oxygen plasma resistance during via etching, metal etching, and resist removal.
| Original language | English |
|---|---|
| Pages (from-to) | 369-372 |
| Number of pages | 4 |
| Journal | Technical Digest - International Electron Devices Meeting |
| Publication status | Published - 1996 Dec 1 |
| Externally published | Yes |
| Event | Proceedings of the 1996 IEEE International Electron Devices Meeting - San Francisco, CA, USA Duration: 1996 Dec 8 → 1996 Dec 11 |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry
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Cite this
Matsubara, Y., Endo, K., Tatsumi, T., Ueno, H., Sugai, K., & Horiuchi, T. (1996). Low-k fluorinated amorphous carbon interlayer technology for quarter micron devices. Technical Digest - International Electron Devices Meeting, 369-372.