Low-current perpendicular domain wall motion cell for scalable high-speed MRAM

S. Fukami; T. Suzuki; K. Nagahara; N. Ohshima; Y. Ozaki; S. Saito; R. Nebashi; N. Sakimura; H. Honjo; K. Mori; C. Igarashi; S. Miura; N. Ishiwata; T. Sugibayashi

Low-current perpendicular domain wall motion cell for scalable high-speed MRAM

S. Fukami, T. Suzuki, K. Nagahara, N. Ohshima, Y. Ozaki, S. Saito, R. Nebashi, N. Sakimura, H. Honjo, K. Mori, C. Igarashi, S. Miura, N. Ishiwata, T. Sugibayashi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

181 Citations (Scopus)

Abstract

We have developed a new magnetic random access memory with current-induced domain wall (DW) motion (DW-motion MRAM). We confirmed its potential of 0.1-mA and 2-ns writing with sufficient thermal stability. The obtained properties indicate that this MRAM can replace conventional high-speed embedded memories.

Original language	English
Title of host publication	2009 Symposium on VLSI Technology, VLSIT 2009
Pages	230-231
Number of pages	2
Publication status	Published - 2009 Nov 16
Externally published	Yes
Event	2009 Symposium on VLSI Technology, VLSIT 2009 - Kyoto, Japan Duration: 2009 Jun 16 → 2009 Jun 18

Publication series

Name	Digest of Technical Papers - Symposium on VLSI Technology
ISSN (Print)	0743-1562

Other

Other	2009 Symposium on VLSI Technology, VLSIT 2009
Country/Territory	Japan
City	Kyoto
Period	09/6/16 → 09/6/18

ASJC Scopus subject areas

Electrical and Electronic Engineering

Cite this

Fukami, S., Suzuki, T., Nagahara, K., Ohshima, N., Ozaki, Y., Saito, S., Nebashi, R., Sakimura, N., Honjo, H., Mori, K., Igarashi, C., Miura, S., Ishiwata, N., & Sugibayashi, T. (2009). Low-current perpendicular domain wall motion cell for scalable high-speed MRAM. In 2009 Symposium on VLSI Technology, VLSIT 2009 (pp. 230-231). [5200610] (Digest of Technical Papers - Symposium on VLSI Technology).

Low-current perpendicular domain wall motion cell for scalable high-speed MRAM. / Fukami, S.; Suzuki, T.; Nagahara, K.; Ohshima, N.; Ozaki, Y.; Saito, S.; Nebashi, R.; Sakimura, N.; Honjo, H.; Mori, K.; Igarashi, C.; Miura, S.; Ishiwata, N.; Sugibayashi, T.

2009 Symposium on VLSI Technology, VLSIT 2009. 2009. p. 230-231 5200610 (Digest of Technical Papers - Symposium on VLSI Technology).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Fukami, S, Suzuki, T, Nagahara, K, Ohshima, N, Ozaki, Y, Saito, S, Nebashi, R, Sakimura, N, Honjo, H, Mori, K, Igarashi, C, Miura, S, Ishiwata, N & Sugibayashi, T 2009, Low-current perpendicular domain wall motion cell for scalable high-speed MRAM. in 2009 Symposium on VLSI Technology, VLSIT 2009., 5200610, Digest of Technical Papers - Symposium on VLSI Technology, pp. 230-231, 2009 Symposium on VLSI Technology, VLSIT 2009, Kyoto, Japan, 09/6/16.

Fukami, S. ; Suzuki, T. ; Nagahara, K. ; Ohshima, N. ; Ozaki, Y. ; Saito, S. ; Nebashi, R. ; Sakimura, N. ; Honjo, H. ; Mori, K. ; Igarashi, C. ; Miura, S. ; Ishiwata, N. ; Sugibayashi, T. / Low-current perpendicular domain wall motion cell for scalable high-speed MRAM. 2009 Symposium on VLSI Technology, VLSIT 2009. 2009. pp. 230-231 (Digest of Technical Papers - Symposium on VLSI Technology).

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abstract = "We have developed a new magnetic random access memory with current-induced domain wall (DW) motion (DW-motion MRAM). We confirmed its potential of 0.1-mA and 2-ns writing with sufficient thermal stability. The obtained properties indicate that this MRAM can replace conventional high-speed embedded memories.",

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AU - Honjo, H.

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AU - Igarashi, C.

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Low-current perpendicular domain wall motion cell for scalable high-speed MRAM

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