TY - JOUR
T1 - Local capacitance-voltage profiling and deep level transient spectroscopy of SiO2/SiC interfaces by scanning nonlinear dielectric microscopy
AU - Yamasue, Kohei
AU - Cho, Yasuo
N1 - Funding Information:
We thank Dr. Hajime Okumura and his group of National Institute of Advanced Industrial Science and Technology, Japan, for providing SiO 2 /SiC samples and macroscopic evaluation results. We also thank Mr. Toshihiko Iwai, Tohoku University, Japan, for the development of SNDM probes. We are grateful for the experimental assistance given by Ms. Tamiko Ambo, Tohoku University, Japan. This work is supported in part by Grant-in-Aid for Scientific Research (S) (Grant No. 16H06360 ) from the Japan Society for the Promotion of Science.
Publisher Copyright:
© 2022 Elsevier Ltd
PY - 2022/8
Y1 - 2022/8
N2 - We extend our local capacitance-voltage profiling method for the real-space nanoscale investigation of the SiO2/SiC interface, which is still an issue in the application of SiC to power electronics devices. Our technique is based on time-resolved scanning nonlinear dielectric microscopy and can be used for collecting local capacitance-voltage and its voltage-derivative profiles at each measurement point. This technique can also be combined with local deep level transient spectroscopy for simultaneously imaging the spatial fluctuations of interface defect density in real-space. Here we use the proposed technique to measure SiC wafers with a thermal oxide layer and investigate the effect of interface nitridation. From the data volume obtained by our technique, various images are extracted and their correlation is analyzed to characterize and discuss the spatial fluctuations and hysteresis of the local capacitance-voltage profiles. As expected, the nitridation of the SiO2/SiC interface after thermal oxidation is effective for the reduction of hysteresis and fluctuations in local capacitance-voltage profiles. However, significant spatial fluctuations remain even after the nitridation treatment, which suggests the SiO2/SiC interface has intrinsic non-uniformity generating high surface potential fluctuations.
AB - We extend our local capacitance-voltage profiling method for the real-space nanoscale investigation of the SiO2/SiC interface, which is still an issue in the application of SiC to power electronics devices. Our technique is based on time-resolved scanning nonlinear dielectric microscopy and can be used for collecting local capacitance-voltage and its voltage-derivative profiles at each measurement point. This technique can also be combined with local deep level transient spectroscopy for simultaneously imaging the spatial fluctuations of interface defect density in real-space. Here we use the proposed technique to measure SiC wafers with a thermal oxide layer and investigate the effect of interface nitridation. From the data volume obtained by our technique, various images are extracted and their correlation is analyzed to characterize and discuss the spatial fluctuations and hysteresis of the local capacitance-voltage profiles. As expected, the nitridation of the SiO2/SiC interface after thermal oxidation is effective for the reduction of hysteresis and fluctuations in local capacitance-voltage profiles. However, significant spatial fluctuations remain even after the nitridation treatment, which suggests the SiO2/SiC interface has intrinsic non-uniformity generating high surface potential fluctuations.
KW - Local capacitance-voltage profiling
KW - Local deep level transient spectroscopy
KW - Scanning nonlinear dielectric microscopy
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U2 - 10.1016/j.microrel.2022.114588
DO - 10.1016/j.microrel.2022.114588
M3 - Article
AN - SCOPUS:85132210994
SN - 0026-2714
VL - 135
JO - Microelectronics Reliability
JF - Microelectronics Reliability
M1 - 114588
ER -