Local-and-global stall mechanism for systolic computational-memory array on extensible multi-FPGA system

Wang Luzhou, Kentaro Sano, Satoru Yamamoto

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

So far we have proposed the systolic computational-memory (SCM) architecture for high-performance and scalable computation based on the finite difference methods. Although the SCM architecture has a completely parallel array structure, a lot of semiconductor devices are required to build a larger SCM array in the real world, which prefers a globally asynchronous and locally synchronous (GALS) design with different clock domains for system extensibility. This paper presents the local-and-global stall mechanism (LGSM) for an SCM array implemented over multiple FPGAs to guarantee the data-synchronization among FPGAs operating at different clocks. Prototype implementation with ALTERA Stratix III FPGAs shows that the proposed design does not give a big overhead to operating frequency and hardware resource utilization. We also evaluate the scalability of the SCM array over multiple FPGAs considering actual stall cycles.

Original languageEnglish
Title of host publicationProceedings - 2010 International Conference on Field-Programmable Technology, FPT'10
Pages102-109
Number of pages8
DOIs
Publication statusPublished - 2010 Dec 1
Event2010 International Conference on Field-Programmable Technology, FPT'10 - Beijing, China
Duration: 2010 Dec 82010 Dec 10

Publication series

NameProceedings - 2010 International Conference on Field-Programmable Technology, FPT'10

Other

Other2010 International Conference on Field-Programmable Technology, FPT'10
Country/TerritoryChina
CityBeijing
Period10/12/810/12/10

ASJC Scopus subject areas

  • Computational Theory and Mathematics
  • Computer Science Applications

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