Lessons learned from 1-year experience with SX-9 and toward the next generation vector computing

Hiroaki Kobayashi, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Akihiko Musa, Takashi Soga, Yoko Isobe

Research output: Contribution to conferencePaperpeer-review


This paper discusses the performance of the latest vector-parallel supercomputer system SX-9. First, we report HPC challenge benchmark results of the SX-9 system, in which it achieves 19 top one scores in the 28 tests. In addition, we also discuss some tuning techniques for SX-9. We present case study analysis, in which the effects of code tuning for ADB, a newly introduced, software-controllable on chip cache of SX-9, on the sustained performance is examined by using science and engineering applications. Finally, we present our on-going research work on design of a multi-vector core processor toward the next generation vector computing. Through the experimental results, we confirm that vector caching plays an important role to extract the potential of the multi-vector core processor.

Original languageEnglish
Number of pages20
Publication statusPublished - 2010 Jan 1
Event2009 10th Teraflop Workshop - Stuttgart, Germany
Duration: 2009 Mar 162009 Mar 17


Other2009 10th Teraflop Workshop

ASJC Scopus subject areas

  • Software


Dive into the research topics of 'Lessons learned from 1-year experience with SX-9 and toward the next generation vector computing'. Together they form a unique fingerprint.

Cite this