Interacting self-timed pipelines and elementary coupling control modules

Kazuhiro Komatsu, Shuji Sannomiya, Makoto Iwata, Hiroaki Terada, Suguru Kameda, Kazuo Tsubouchi

Research output: Contribution to journalArticlepeer-review

2 Citations (Scopus)

Abstract

The self-timed pipeline (STP) is one of the most promising VLSI/SoC architectures. It achieves efficient utilization of tens of billions of transistors, consumes ultra low power, and is easy-to-design because of its signal integrity and low electro-magnetic interference. These basic features of the STP have been proven by the development of self-timed data-driven multimedia processors, DDMP's. This paper proposes a novel scheme of interacting self-timed (clockless) pipelines by which the various distributed and interconnected pipelines can achieve highly functional stream processing in future giga-transistor chips. The paper also proposes a set of elementary coupling control modules that facilitate various combinations of flow-thru processing between pipelines, and then discusses the practicality of the proposed scheme through the LSI design of application modules such as a priority-based queue, a mutual interconnection network, and a pipelined sorter.

Original languageEnglish
Pages (from-to)1642-1651
Number of pages10
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE92-A
Issue number7
DOIs
Publication statusPublished - 2009 Jan 1

Keywords

  • Flow-thru processing
  • Interacting pipelines
  • Self-timed pipeline
  • VLSI/SoC architecture

ASJC Scopus subject areas

  • Signal Processing
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering
  • Applied Mathematics

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