Intelligent image sensor chip with three dimensional structure

H. Kurino, K. W. Lee, T. Nakamura, K. Sakuma, K. T. Park, N. Miyakawa, H. Shimazutsu, K. Y. Kim, K. Inamura, M. Koyanagi

Research output: Contribution to journalConference articlepeer-review

83 Citations (Scopus)

Abstract

A new three-dimensional (3D) integration technology based on wafer bonding technique has been proposed for intelligent image sensor chip with 3D stacked structure. We have developed key technologies for such 3D integration. A 3D image sensor test chip was fabricated using this 3D integration technology. Basic electric characteristics were evaluated in the 3D image sensor test chip.

Original languageEnglish
Pages (from-to)879-882
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting
Publication statusPublished - 1999 Dec 1
Event1999 IEEE International Devices Meeting (IEDM) - Washington, DC, USA
Duration: 1999 Dec 51999 Dec 8

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering
  • Materials Chemistry

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