Intelligent image sensor chip with three dimensional structure

H. Kurino; K. W. Lee; T. Nakamura; K. Sakuma; K. T. Park; N. Miyakawa; H. Shimazutsu; K. Y. Kim; K. Inamura; M. Koyanagi

Intelligent image sensor chip with three dimensional structure

H. Kurino, K. W. Lee, T. Nakamura, K. Sakuma, K. T. Park, N. Miyakawa, H. Shimazutsu, K. Y. Kim, K. Inamura, M. Koyanagi

New Industry Creation Hatchery Center (NICHe)

Research output: Contribution to journal › Conference article › peer-review

91 Citations (Scopus)

Abstract

A new three-dimensional (3D) integration technology based on wafer bonding technique has been proposed for intelligent image sensor chip with 3D stacked structure. We have developed key technologies for such 3D integration. A 3D image sensor test chip was fabricated using this 3D integration technology. Basic electric characteristics were evaluated in the 3D image sensor test chip.

Original language	English
Pages (from-to)	879-882
Number of pages	4
Journal	Technical Digest - International Electron Devices Meeting
Publication status	Published - 1999
Event	1999 IEEE International Devices Meeting (IEDM) - Washington, DC, USA Duration: 1999 Dec 5 → 1999 Dec 8

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

Cite this

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title = "Intelligent image sensor chip with three dimensional structure",

abstract = "A new three-dimensional (3D) integration technology based on wafer bonding technique has been proposed for intelligent image sensor chip with 3D stacked structure. We have developed key technologies for such 3D integration. A 3D image sensor test chip was fabricated using this 3D integration technology. Basic electric characteristics were evaluated in the 3D image sensor test chip.",

author = "H. Kurino and Lee, {K. W.} and T. Nakamura and K. Sakuma and Park, {K. T.} and N. Miyakawa and H. Shimazutsu and Kim, {K. Y.} and K. Inamura and M. Koyanagi",

year = "1999",

language = "English",

pages = "879--882",

journal = "Technical Digest - International Electron Devices Meeting",

issn = "0163-1918",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "1999 IEEE International Devices Meeting (IEDM) ; Conference date: 05-12-1999 Through 08-12-1999",

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TY - JOUR

T1 - Intelligent image sensor chip with three dimensional structure

AU - Kurino, H.

AU - Lee, K. W.

AU - Nakamura, T.

AU - Sakuma, K.

AU - Park, K. T.

AU - Miyakawa, N.

AU - Shimazutsu, H.

AU - Kim, K. Y.

AU - Inamura, K.

AU - Koyanagi, M.

PY - 1999

Y1 - 1999

N2 - A new three-dimensional (3D) integration technology based on wafer bonding technique has been proposed for intelligent image sensor chip with 3D stacked structure. We have developed key technologies for such 3D integration. A 3D image sensor test chip was fabricated using this 3D integration technology. Basic electric characteristics were evaluated in the 3D image sensor test chip.

AB - A new three-dimensional (3D) integration technology based on wafer bonding technique has been proposed for intelligent image sensor chip with 3D stacked structure. We have developed key technologies for such 3D integration. A 3D image sensor test chip was fabricated using this 3D integration technology. Basic electric characteristics were evaluated in the 3D image sensor test chip.

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UR - http://www.scopus.com/inward/citedby.url?scp=0033329320&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0033329320

SN - 0163-1918

SP - 879

EP - 882

JO - Technical Digest - International Electron Devices Meeting

JF - Technical Digest - International Electron Devices Meeting

T2 - 1999 IEEE International Devices Meeting (IEDM)

Y2 - 5 December 1999 through 8 December 1999

ER -

Intelligent image sensor chip with three dimensional structure

Abstract

ASJC Scopus subject areas

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