InP MISFET's with Al203/Native Oxide Double-Layer Gate Insulators

Takayuki Sawada, Shin Itagaki, Hideki Hasegawa, Hideo Ohno

Research output: Contribution to journalArticle

33 Citations (Scopus)

Abstract

Enhancement-mode InP MISFET's with anodic AI2Q3/ native oxide double-layer for gate insulator are fabricated by anodization processes in electrolyte and in oxygen plasma. Such gate structure greatly improves the device performance; high effective electron mobilities of 1500–3000 cm2/V. s and marked reduction of drain current instability were simultaneously achieved. This device performance is consistent with the interface properties obtained by C-V measurements, InP MISFET inverters as well as ring oscillators are also fabricated to demonstrate the stability of the circuit at low frequency and to show the capability of the process employed.

Original languageEnglish
Pages (from-to)1038-1043
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume31
Issue number8
DOIs
Publication statusPublished - 1984 Aug
Externally publishedYes

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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