Incorporating the parallel processing techniques with the demand-driven model of functional programming languages

Hong Shen; Hiroaki Kobayashi; Tadao Nakamura

Incorporating the parallel processing techniques with the demand-driven model of functional programming languages

Hong Shen, Hiroaki Kobayashi, Tadao Nakamura

INF - Computer and Mathematical Sciences

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

This paper presents a hybrid reduction scheme that incorporates parallel processing techniques into the demand-driven model of functional programs. With this scheme, functional language programs can be executed in parallel at three different levels, which are the parallel execution of vectors inside a redex, the parallel reduction of multiple redexes, and the high level pipeline processing. The high level pipeline consists of three stages that are redex detection, redex allocation and reduction execution. Moreover, memory latency and switch network latency that cannot be ignored in usual multiprocessor systems can effectively be eliminated by embedding the memory access and the switch network transmission into the high level pipeline. Experimental results of the software simulator reveal the potential performance of the hybrid reduction scheme. Functional language FL is chosen as the target language in our research work.

Original language	English
Title of host publication	Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering
Publisher	Publ by IEEE
Pages	146-149
Number of pages	4
ISBN (Print)	0780312333
Publication status	Published - 1993
Event	Proceedings of the 1993 IEEE Region 10 Conference on Computer, Communication, Control and Power Engineering (TENCON '93). Part 1 (of 5) - Beijing, China Duration: 1993 Oct 19 → 1993 Oct 21

Publication series

Name	Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering

Other

Other	Proceedings of the 1993 IEEE Region 10 Conference on Computer, Communication, Control and Power Engineering (TENCON '93). Part 1 (of 5)
City	Beijing, China
Period	93/10/19 → 93/10/21

ASJC Scopus subject areas

Engineering(all)

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Shen, H., Kobayashi, H., & Nakamura, T. (1993). Incorporating the parallel processing techniques with the demand-driven model of functional programming languages. In Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering (pp. 146-149). (Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering). Publ by IEEE.

Incorporating the parallel processing techniques with the demand-driven model of functional programming languages. / Shen, Hong; Kobayashi, Hiroaki; Nakamura, Tadao.

Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering. Publ by IEEE, 1993. p. 146-149 (Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Shen, H, Kobayashi, H & Nakamura, T 1993, Incorporating the parallel processing techniques with the demand-driven model of functional programming languages. in Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering. Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering, Publ by IEEE, pp. 146-149, Proceedings of the 1993 IEEE Region 10 Conference on Computer, Communication, Control and Power Engineering (TENCON '93). Part 1 (of 5), Beijing, China, 93/10/19.

Shen H, Kobayashi H, Nakamura T. Incorporating the parallel processing techniques with the demand-driven model of functional programming languages. In Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering. Publ by IEEE. 1993. p. 146-149. (Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering).

Shen, Hong ; Kobayashi, Hiroaki ; Nakamura, Tadao. / Incorporating the parallel processing techniques with the demand-driven model of functional programming languages. Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering. Publ by IEEE, 1993. pp. 146-149 (Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering).

@inproceedings{475fe85735ed4fbbb3ef4b81945c5c4c,

title = "Incorporating the parallel processing techniques with the demand-driven model of functional programming languages",

abstract = "This paper presents a hybrid reduction scheme that incorporates parallel processing techniques into the demand-driven model of functional programs. With this scheme, functional language programs can be executed in parallel at three different levels, which are the parallel execution of vectors inside a redex, the parallel reduction of multiple redexes, and the high level pipeline processing. The high level pipeline consists of three stages that are redex detection, redex allocation and reduction execution. Moreover, memory latency and switch network latency that cannot be ignored in usual multiprocessor systems can effectively be eliminated by embedding the memory access and the switch network transmission into the high level pipeline. Experimental results of the software simulator reveal the potential performance of the hybrid reduction scheme. Functional language FL is chosen as the target language in our research work.",

author = "Hong Shen and Hiroaki Kobayashi and Tadao Nakamura",

year = "1993",

language = "English",

isbn = "0780312333",

series = "Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering",

publisher = "Publ by IEEE",

pages = "146--149",

booktitle = "Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering",

note = "Proceedings of the 1993 IEEE Region 10 Conference on Computer, Communication, Control and Power Engineering (TENCON '93). Part 1 (of 5) ; Conference date: 19-10-1993 Through 21-10-1993",

}

TY - GEN

T1 - Incorporating the parallel processing techniques with the demand-driven model of functional programming languages

AU - Shen, Hong

AU - Kobayashi, Hiroaki

AU - Nakamura, Tadao

PY - 1993

Y1 - 1993

N2 - This paper presents a hybrid reduction scheme that incorporates parallel processing techniques into the demand-driven model of functional programs. With this scheme, functional language programs can be executed in parallel at three different levels, which are the parallel execution of vectors inside a redex, the parallel reduction of multiple redexes, and the high level pipeline processing. The high level pipeline consists of three stages that are redex detection, redex allocation and reduction execution. Moreover, memory latency and switch network latency that cannot be ignored in usual multiprocessor systems can effectively be eliminated by embedding the memory access and the switch network transmission into the high level pipeline. Experimental results of the software simulator reveal the potential performance of the hybrid reduction scheme. Functional language FL is chosen as the target language in our research work.

AB - This paper presents a hybrid reduction scheme that incorporates parallel processing techniques into the demand-driven model of functional programs. With this scheme, functional language programs can be executed in parallel at three different levels, which are the parallel execution of vectors inside a redex, the parallel reduction of multiple redexes, and the high level pipeline processing. The high level pipeline consists of three stages that are redex detection, redex allocation and reduction execution. Moreover, memory latency and switch network latency that cannot be ignored in usual multiprocessor systems can effectively be eliminated by embedding the memory access and the switch network transmission into the high level pipeline. Experimental results of the software simulator reveal the potential performance of the hybrid reduction scheme. Functional language FL is chosen as the target language in our research work.

UR - http://www.scopus.com/inward/record.url?scp=0027812839&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0027812839&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:0027812839

SN - 0780312333

T3 - Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering

SP - 146

EP - 149

BT - Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering

PB - Publ by IEEE

T2 - Proceedings of the 1993 IEEE Region 10 Conference on Computer, Communication, Control and Power Engineering (TENCON '93). Part 1 (of 5)

Y2 - 19 October 1993 through 21 October 1993

ER -