TY - GEN
T1 - Improvement of the reliability of thin-film interconnections based on the control of the crystallinity of the thin films
AU - Asai, Osamu
AU - Furuya, Ryosuke
AU - Fan, Chuanhong
AU - Suzuki, Ken
AU - Miura, Hideo
PY - 2013/12/1
Y1 - 2013/12/1
N2 - Electroplated copper thin films have started to be applied to not only interconnections in printed wiring boards, but also thin film interconnections and TSV (Through Silicon Via) in semiconductor devices because of its low electric resistivity and high thermal conductivity. Thus, the electrical reliability of the electroplated copper interconnections was discussed experimentally. The relationship between the electrical properties and crystallographic quality (crystallinity) of electroplated copper thin-film interconnections was investigated. The crystallinity of the grains and grain boundaries of the interconnections was evaluated on the basis of the image quality (IQ) value obtained by electron back-scatter diffraction (EBSD) analysis. The electrical properties of the interconnections vary significantly depending on their crystallinity. The crystallinity also changed drastically as functions of electroplating conditions and the annealing temperature after electroplating. Although the electro migration (EM) resistance of the annealed interconnection is improved, the stress-induced migration (SM) is activated by a high residual tensile stress after annealing caused by the strong constraint of the shrinkage of the film during recrystallization. To improve its electrical reliability without heat treatment after the electroplating, the effects of the seed layer under the interconnections on the crystallinity of the electroplated film was investigated. As a result, the crystallinity was improved by changing the seed layer from Cu to Ru. In addition, the decrease in current density during electroplating also improves the crystallinity. Therefore, both introducing the Ru seed layer in addition to decreasing the current density during electroplating is effective for developing highly reliable copper interconnections.
AB - Electroplated copper thin films have started to be applied to not only interconnections in printed wiring boards, but also thin film interconnections and TSV (Through Silicon Via) in semiconductor devices because of its low electric resistivity and high thermal conductivity. Thus, the electrical reliability of the electroplated copper interconnections was discussed experimentally. The relationship between the electrical properties and crystallographic quality (crystallinity) of electroplated copper thin-film interconnections was investigated. The crystallinity of the grains and grain boundaries of the interconnections was evaluated on the basis of the image quality (IQ) value obtained by electron back-scatter diffraction (EBSD) analysis. The electrical properties of the interconnections vary significantly depending on their crystallinity. The crystallinity also changed drastically as functions of electroplating conditions and the annealing temperature after electroplating. Although the electro migration (EM) resistance of the annealed interconnection is improved, the stress-induced migration (SM) is activated by a high residual tensile stress after annealing caused by the strong constraint of the shrinkage of the film during recrystallization. To improve its electrical reliability without heat treatment after the electroplating, the effects of the seed layer under the interconnections on the crystallinity of the electroplated film was investigated. As a result, the crystallinity was improved by changing the seed layer from Cu to Ru. In addition, the decrease in current density during electroplating also improves the crystallinity. Therefore, both introducing the Ru seed layer in addition to decreasing the current density during electroplating is effective for developing highly reliable copper interconnections.
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U2 - 10.1115/IPACK2013-73149
DO - 10.1115/IPACK2013-73149
M3 - Conference contribution
AN - SCOPUS:84894663658
SN - 9780791855751
T3 - ASME 2013 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2013
BT - ASME 2013 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2013
T2 - ASME 2013 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems, InterPACK 2013
Y2 - 16 July 2013 through 18 July 2013
ER -