Improvement in fermi-level pinning of p-MOS metal gate electrodes on HfSiON by employing Ru gate electrodes

M. Kadoshima, Y. Sugita, K. Shiraishi, H. Watanabe, A. Ohta, S. Miyazaki, K. Nakajima, T. Chikyow, K. Yamada, T. Aminaka, E. Kurosawa, T. Matsuki, T. Aoyama, Y. Nara, Y. Ohji

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Methods of improving Fermi-level pinning of pure metal gate electrodes on Hf-based high-k dielectrics have been investigated. The pinning phenomenon is a crucial problem, resulting in an unintentional threshold voltage increase in p-MOSFETs when applying pure metal gate electrodes such as Ru and TiN in Hfbased high-k CMOS. After systematic investigation of the relation between oxygen vacancies in Hf-based high-k dielectrics and electrical characteristics, we concluded that the Fermi-level pinning is unavoidable in principle with a thin EOT, but is a stable phenomenon that should be intentionally utilized. It is necessary to modulate the stable pinning energy position of Hf-based high-k dielectrics in p-MOSFETs in order to obtain thin EOTs in the gate-first process.

Original languageEnglish
Title of host publicationECS Transactions - 5th International Symposium on High Dielectric Constant Materials and Gate Stacks
Pages169-180
Number of pages12
Edition4
DOIs
Publication statusPublished - 2007
Event5th International Symposium on High Dielectric Constant Materials and Gate Stacks - 212th ECS Meeting - Washington, DC, United States
Duration: 2007 Oct 82007 Oct 10

Publication series

NameECS Transactions
Number4
Volume11
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Other

Other5th International Symposium on High Dielectric Constant Materials and Gate Stacks - 212th ECS Meeting
CountryUnited States
CityWashington, DC
Period07/10/807/10/10

ASJC Scopus subject areas

  • Engineering(all)

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