Abstract
This paper attempts to clarify the problems which occur in implementation of a large‐scale neural network. First, a neural A‐D converter with CMOS circuits is designed. Asymmetrical synaptic weights were used to avoid the local minima problem for a neural A‐D converter. Furthermore, a chip is fabricated using 4 μm CMOS technology. Its successful action as an A‐D converter is verified and some possible causes of misoperation of the present circuit are presented.
| Original language | English |
|---|---|
| Pages (from-to) | 92-102 |
| Number of pages | 11 |
| Journal | Electronics and Communications in Japan (Part II: Electronics) |
| Volume | 75 |
| Issue number | 7 |
| DOIs | |
| Publication status | Published - 1992 Jan 1 |
Keywords
- Periodic waveguide
- dielectric loaded waveguide
- finite element method
ASJC Scopus subject areas
- Physics and Astronomy(all)
- Computer Networks and Communications
- Electrical and Electronic Engineering
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Sato, S., Nishimura, T., Murota, J., Nakajima, K., & Sawada, Y. (1992). Implementation of a class of asymmetrical neural networks with application to an a‐d converter. Electronics and Communications in Japan (Part II: Electronics), 75(7), 92-102. https://doi.org/10.1002/ecjb.4420750711