Impact of two-step-recessed gate structure on RF performance of InP-based HEMTs

Tetsuya Suemitsu, T. Enoki, H. Yokoyama, Y. Umeda, Y. Ishii

Research output: Contribution to journalArticlepeer-review

14 Citations (Scopus)

Abstract

The RF performance of InP-based lattice-matched high electron mobility transistors (HEMTs) is improved by using a two-step-recess process. 0.07 μm gate HEMTs show a cutoff frequency (fT) of 300GHz, a value previously achievable only with a gate length of 0.05μm in the conventional gate structure, and a maximum frequency of oscillation fmax of 400GHz. The high fT indicates that the effective gate length is successfully suppressed by the two-step-recessed gate structure. Moreover, owing to the selective etching property, this gate recess process provides high uniformity of the threshold voltage and the cutoff frequency of the HEMTs on a 3in wafer.

Original languageEnglish
Pages (from-to)220-222
Number of pages3
JournalElectronics Letters
Volume34
Issue number2
DOIs
Publication statusPublished - 1998 Jan 22
Externally publishedYes

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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