Impact of deep-via plasma etching process on transistor performance in 3D-IC with via-last backside TSV

Yohei Sugawara; Hideto Hashiguchi; Seiya Tanikawa; Hisashi Kino; Kang Wook Lee; Takafumi Fukusima; Mitsumasa Koyanagi; Tetsu Tanaka

doi:10.1109/ECTC.2015.7159687

Impact of deep-via plasma etching process on transistor performance in 3D-IC with via-last backside TSV

Yohei Sugawara, Hideto Hashiguchi, Seiya Tanikawa, Hisashi Kino, Kang Wook Lee, Takafumi Fukusima, Mitsumasa Koyanagi, Tetsu Tanaka

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

3D-IC (3D-stacked integrated circuit) requires lots of through-Si vias (TSVs) and metal microbumps for electrical connection among stacked LSI chips to realize higher performance beyond 2D-IC. However, plasma etching process for via-last backside TSV formation could damage many transistors used in the 3D-IC. In this study, plasma-induced charge-up damages on transistor characteristics during viahole etching have been investigated using test structures flipchip bonded on Si interposer. Additionally, antenna rules for the 3D-IC layout and process design were also mentioned.

Original language	English
Title of host publication	Proceedings - Electronic Components and Technology Conference
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	822-827
Number of pages	6
Volume	2015-July
ISBN (Print)	9781479986095
DOIs	https://doi.org/10.1109/ECTC.2015.7159687
Publication status	Published - 2015 Jul 15
Event	2015 65th IEEE Electronic Components and Technology Conference, ECTC 2015 - San Diego, United States Duration: 2015 May 26 → 2015 May 29

Other

Other	2015 65th IEEE Electronic Components and Technology Conference, ECTC 2015
Country	United States
City	San Diego
Period	15/5/26 → 15/5/29

ASJC Scopus subject areas

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

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Sugawara, Y., Hashiguchi, H., Tanikawa, S., Kino, H., Lee, K. W., Fukusima, T., Koyanagi, M., & Tanaka, T. (2015). Impact of deep-via plasma etching process on transistor performance in 3D-IC with via-last backside TSV. In Proceedings - Electronic Components and Technology Conference (Vol. 2015-July, pp. 822-827). [7159687] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ECTC.2015.7159687

Impact of deep-via plasma etching process on transistor performance in 3D-IC with via-last backside TSV. / Sugawara, Yohei; Hashiguchi, Hideto; Tanikawa, Seiya; Kino, Hisashi; Lee, Kang Wook; Fukusima, Takafumi; Koyanagi, Mitsumasa; Tanaka, Tetsu.

Proceedings - Electronic Components and Technology Conference. Vol. 2015-July Institute of Electrical and Electronics Engineers Inc., 2015. p. 822-827 7159687.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Sugawara, Y, Hashiguchi, H, Tanikawa, S, Kino, H, Lee, KW, Fukusima, T, Koyanagi, M & Tanaka, T 2015, Impact of deep-via plasma etching process on transistor performance in 3D-IC with via-last backside TSV. in Proceedings - Electronic Components and Technology Conference. vol. 2015-July, 7159687, Institute of Electrical and Electronics Engineers Inc., pp. 822-827, 2015 65th IEEE Electronic Components and Technology Conference, ECTC 2015, San Diego, United States, 15/5/26. https://doi.org/10.1109/ECTC.2015.7159687

Sugawara Y, Hashiguchi H, Tanikawa S, Kino H, Lee KW, Fukusima T et al. Impact of deep-via plasma etching process on transistor performance in 3D-IC with via-last backside TSV. In Proceedings - Electronic Components and Technology Conference. Vol. 2015-July. Institute of Electrical and Electronics Engineers Inc. 2015. p. 822-827. 7159687 https://doi.org/10.1109/ECTC.2015.7159687

Sugawara, Yohei ; Hashiguchi, Hideto ; Tanikawa, Seiya ; Kino, Hisashi ; Lee, Kang Wook ; Fukusima, Takafumi ; Koyanagi, Mitsumasa ; Tanaka, Tetsu. / Impact of deep-via plasma etching process on transistor performance in 3D-IC with via-last backside TSV. Proceedings - Electronic Components and Technology Conference. Vol. 2015-July Institute of Electrical and Electronics Engineers Inc., 2015. pp. 822-827

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