Ultra-thin SiO2 layers on Si (e.g., sub-10 nm) will be increasingly important in future VLSI devices. Precise control of thickness and interface roughness are important parameters. High resolution electron microscopy (HREM) is extremely effective for characterizing such features, as is illustrated here for gate oxides and tunneling oxides.
|Number of pages||3|
|Publication status||Published - 1995 Dec 1|
|Event||Proceedings of the 1995 4th International Conference on Solid-State and Integrated Circuit Technology - Beijing, China|
Duration: 1995 Oct 24 → 1995 Oct 28
|Other||Proceedings of the 1995 4th International Conference on Solid-State and Integrated Circuit Technology|
|Period||95/10/24 → 95/10/28|
ASJC Scopus subject areas