This paper reports a solution to the problem involving cracks in high power transistor chips that appeared during package development. Header deformation observation by holographic interferometry indicated the cause of the chip cracking. The observation method is described. The reason for chip cracks is discussed and the performance of headers fabricated in order to prevent chip cracks is discussed.
|Number of pages||9|
|Journal||NEC Research and Development|
|Publication status||Published - 1977 Jan 1|
ASJC Scopus subject areas
- Electrical and Electronic Engineering