Highly-scalable disruptive reading and restoring scheme for Gb-scale SPRAM and beyond

R. Takemura; T. Kawahara; K. Ono; K. Miura; H. Matsuoka; H. Ohno

doi:10.1016/j.sse.2010.11.032

Highly-scalable disruptive reading and restoring scheme for Gb-scale SPRAM and beyond

R. Takemura, T. Kawahara, K. Ono, K. Miura, H. Matsuoka, H. Ohno

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Research output: Contribution to journal › Article › peer-review

3 Citations (Scopus)

Abstract

We propose a disruptive reading and restoration scheme for a high density spin-transfer-torque random access memory (SPRAM). The proposed scheme uses the feature that - with a desired error rate and a tunnel magneto resistance (TMR) device, which is the memory device of the SPRAM - does not switch its magnetization of free layer in a specific period of large current pulse. The restoration operation is performed to secure the storing data. As a result, by keeping good scalability of spin-transfer-torque writing toward Gb-scale and beyond, high-speed reading with read-disturbance-free operation can be achieved. This operation also enables the SPRAM to accept the DDRx-SDRAM compatible operation. In addition, we also proposed a 4-F² cell structure with a vertical transistor and prospected the reliability of a tunnel barrier of the TMR devices for a Gb-scale SPRAM.

Original language	English
Pages (from-to)	28-33
Number of pages	6
Journal	Solid-State Electronics
Volume	58
Issue number	1
DOIs	https://doi.org/10.1016/j.sse.2010.11.032
Publication status	Published - 2011 Apr 1

Keywords

DDR compatible operation
Disruptive reading
Nonvolatile RAM
SPRAM
Spin-transfer-torque
TMR

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

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title = "Highly-scalable disruptive reading and restoring scheme for Gb-scale SPRAM and beyond",

abstract = "We propose a disruptive reading and restoration scheme for a high density spin-transfer-torque random access memory (SPRAM). The proposed scheme uses the feature that - with a desired error rate and a tunnel magneto resistance (TMR) device, which is the memory device of the SPRAM - does not switch its magnetization of free layer in a specific period of large current pulse. The restoration operation is performed to secure the storing data. As a result, by keeping good scalability of spin-transfer-torque writing toward Gb-scale and beyond, high-speed reading with read-disturbance-free operation can be achieved. This operation also enables the SPRAM to accept the DDRx-SDRAM compatible operation. In addition, we also proposed a 4-F2 cell structure with a vertical transistor and prospected the reliability of a tunnel barrier of the TMR devices for a Gb-scale SPRAM.",

keywords = "DDR compatible operation, Disruptive reading, Nonvolatile RAM, SPRAM, Spin-transfer-torque, TMR",

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T1 - Highly-scalable disruptive reading and restoring scheme for Gb-scale SPRAM and beyond

AU - Takemura, R.

AU - Kawahara, T.

AU - Ono, K.

AU - Miura, K.

AU - Matsuoka, H.

AU - Ohno, H.

PY - 2011/4/1

Y1 - 2011/4/1

N2 - We propose a disruptive reading and restoration scheme for a high density spin-transfer-torque random access memory (SPRAM). The proposed scheme uses the feature that - with a desired error rate and a tunnel magneto resistance (TMR) device, which is the memory device of the SPRAM - does not switch its magnetization of free layer in a specific period of large current pulse. The restoration operation is performed to secure the storing data. As a result, by keeping good scalability of spin-transfer-torque writing toward Gb-scale and beyond, high-speed reading with read-disturbance-free operation can be achieved. This operation also enables the SPRAM to accept the DDRx-SDRAM compatible operation. In addition, we also proposed a 4-F2 cell structure with a vertical transistor and prospected the reliability of a tunnel barrier of the TMR devices for a Gb-scale SPRAM.

AB - We propose a disruptive reading and restoration scheme for a high density spin-transfer-torque random access memory (SPRAM). The proposed scheme uses the feature that - with a desired error rate and a tunnel magneto resistance (TMR) device, which is the memory device of the SPRAM - does not switch its magnetization of free layer in a specific period of large current pulse. The restoration operation is performed to secure the storing data. As a result, by keeping good scalability of spin-transfer-torque writing toward Gb-scale and beyond, high-speed reading with read-disturbance-free operation can be achieved. This operation also enables the SPRAM to accept the DDRx-SDRAM compatible operation. In addition, we also proposed a 4-F2 cell structure with a vertical transistor and prospected the reliability of a tunnel barrier of the TMR devices for a Gb-scale SPRAM.

KW - DDR compatible operation

KW - Disruptive reading

KW - Nonvolatile RAM

KW - SPRAM

KW - Spin-transfer-torque

KW - TMR

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