Highly reliable single-ended current-mode circuit for an inter-chip asynchronous communication link

Akira Mochizuki, Hirokatsu Shirahama, Naoya Onizawa, Takahiro Hanyu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A single-ended current-mode interface circuit with a single-rail wire is proposed for a high-speed and highly reliable inter-chip communication link in an asynchronous network-on-chip system. The impedance of the single-rail wire is matched to the impedance of the receiver by inserting the MOS transistors, and the current signal level on the link is enlarged in the proposed interface circuit. As a result, crosstalk noise superposed on a single-rail wire can be reduced. It is demonstrated that the noise influences are eliminated under 130nm and 65nm CMOS technologies.

Original languageEnglish
Title of host publication2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages683-686
Number of pages4
EditionFebruary
ISBN (Electronic)9781479952304
DOIs
Publication statusPublished - 2015 Feb 5
Event2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014 - Ishigaki Island, Okinawa, Japan
Duration: 2014 Nov 172014 Nov 20

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS
NumberFebruary
Volume2015-February

Other

Other2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014
CountryJapan
CityIshigaki Island, Okinawa
Period14/11/1714/11/20

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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