Highly reliable multiple-valued circuit based on dual-rail differential logic

Akira Mochizuki, Takahiro Hanyu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

A new multiple-valued circuit based on dual-rail differential logic is proposed for crosstalk noise reduction. Since a dual-rail complementary duplication is performed by using two differential-pair circuits (DPCs), noise effect is distributed to only one DPC, if common-mode, noise is applied to dual-rail input lines. The dual-rail complementary duplicated DPCs makes noise effect reduced, because one of the DPC makes error operation and the other makes no-error operation, so that the output noise level which is summed up of two DPCs becomes half. By using the Schmitt-trigger circuit, the half-level noise effect from two DPCs is almost eliminated. As a typical design example of arithmetic modules, it is discussed to implement a crosstalk-noise-free radix-2 signed-digit full adder in a 0.18μm CMOS technology at the supply voltage of 1.8V.

Original languageEnglish
Title of host publication36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006
Number of pages1
DOIs
Publication statusPublished - 2006 Nov 21
Event36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006 - Singapore, Singapore
Duration: 2006 May 172006 May 20

Publication series

NameProceedings of The International Symposium on Multiple-Valued Logic
ISSN (Print)0195-623X

Other

Other36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006
Country/TerritorySingapore
CitySingapore
Period06/5/1706/5/20

ASJC Scopus subject areas

  • Computer Science(all)
  • Mathematics(all)

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