Highly reliable multiple-valued circuit based on dual-rail differential logic

A new multiple-valued circuit based on dual-rail differential logic is proposed for crosstalk noise reduction. Since a dual-rail complementary duplication is performed by using two differential-pair circuits (DPCs), noise effect is distributed to only one DPC, if common-mode, noise is applied to dual-rail input lines. The dual-rail complementary duplicated DPCs makes noise effect reduced, because one of the DPC makes error operation and the other makes no-error operation, so that the output noise level which is summed up of two DPCs becomes half. By using the Schmitt-trigger circuit, the half-level noise effect from two DPCs is almost eliminated. As a typical design example of arithmetic modules, it is discussed to implement a crosstalk-noise-free radix-2 signed-digit full adder in a 0.18μm CMOS technology at the supply voltage of 1.8V.