Highly-parallel stereo vision VLSI processor based on an optimal parallel memory access scheme

In a real-time vision system, parallel memory access is essential for highly parallel image processing. The use of multiple memory modules is one efficient technique for parallel access. In the technique, data stored in different memory modules can be accessed in parallel. This paper presents an optimal memory allocation methodology to map data to be read in parallel onto different memory modules. Based on the methodology, a high-performance VLSI processor for three-dimensional instrumentation is proposed.