Highly-parallel stereo vision VLSI processor based on an optimal parallel memory access scheme

M. Hariyama, S. Lee, M. Kameyama

Research output: Contribution to journalArticlepeer-review

6 Citations (Scopus)

Abstract

In a real-time vision system, parallel memory access is essential for highly parallel image processing. The use of multiple memory modules is one efficient technique for parallel access. In the technique, data stored in different memory modules can be accessed in parallel. This paper presents an optimal memory allocation methodology to map data to be read in parallel onto different memory modules. Based on the methodology, a high-performance VLSI processor for three-dimensional instrumentation is proposed.

Original languageEnglish
Pages (from-to)382-389
Number of pages8
JournalIEICE Transactions on Electronics
VolumeE84-C
Issue number3
Publication statusPublished - 2001 Mar

Keywords

  • Functional-unit allocation
  • Memory allocation
  • Motion stereo

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'Highly-parallel stereo vision VLSI processor based on an optimal parallel memory access scheme'. Together they form a unique fingerprint.

Cite this