Highly Parallel Residue Arithmetic Chip Based on Multiple-Valued Bidirectional Current-Mode Logic

Michitaka Kameyama, Tatsuo Higuchi, Tsutomu Sekibe

Research output: Contribution to journalArticlepeer-review

14 Citations (Scopus)

Abstract

This paper discusses the implementation of a residue arithmetic circuit using multiple-valued bidirectional current-mode MOS technology. Each residue digit is represented by new multiple-valued coding suitable for highly parallel computation. By the coding, mod mimultiplication can be simply performed by a shift operation. In mod addition, miradix-5 signed-digit (SD) arithmetic is employed for a high degree of parallelism and multiple-operand addition, so that high-speed arithmetic operations can be achieved. Finally, the mod7 three-operand multiply adder is designed and fabricated as an integrated circuit based on 10-μm CMOS technology.

Original languageEnglish
Pages (from-to)1404-1411
Number of pages8
JournalIEEE Journal of Solid-State Circuits
Volume24
Issue number5
DOIs
Publication statusPublished - 1989 Oct

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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