High-performance self-aligned graphene transistors fabricated using contamination-and defect-free process

Goon Ho Park, Kwansoo Kim, Hirokazu Fukidome, Tetsuya Suemitsu, Taiichi Otsuji, Won Ju Cho, Maki Suemitsu

Research output: Contribution to journalArticlepeer-review


A contamination-and defect-free process is proposed for self-aligned graphene field-effect transistor (GFET) fabrication using a protective gold layer and by its etching. The gold layer serves as an electrode metal for both the source and drain. GFETs fabricated by this method exhibit superior electrical characteristics, such as an intrinsic carrier mobility of 8900 cm2V%1 s%1 and a series resistance of 1520m, which is ascribed to the effective blocking of unwanted contamination and defect formation as well as to the reduction in access length due to the self-aligned configuration. Our approach is quite promising as a device fabrication method for high-performance GFETs.

Original languageEnglish
Article number06GF11
JournalJapanese journal of applied physics
Issue number6
Publication statusPublished - 2016 Jun

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)


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