TY - GEN
T1 - High performance and high reliability dual metal CMOS gate stacks using novel high-k Bi-layer control technique
AU - Ando, T.
AU - Hirano, T.
AU - Tai, K.
AU - Yamaguchi, S.
AU - Tanaka, K.
AU - Oshiyama, I.
AU - Nakata, M.
AU - Watanabe, K.
AU - Yamamoto, R.
AU - Kanda, S.
AU - Tateshita, Y.
AU - Wakabayashi, H.
AU - Tagawa, Y.
AU - Tsukamoto, M.
AU - Iwamoto, H.
AU - Saito, M.
AU - Toyoda, S.
AU - Kumigashira, H.
AU - Oshima, M.
AU - Nagashima, N.
AU - Kadomura, S.
N1 - Copyright:
Copyright 2019 Elsevier B.V., All rights reserved.
PY - 2007
Y1 - 2007
N2 - The impacts of interfacial layer (IFL) thickness and crystallinity of HfO2/IFL bi-layer on electrical properties were clarified using synchrotron radiation photoemission spectroscopy (SRPES) and electrical measurements of nFETs (HfSix/HfO2) and pFETs (Ru/HfO 2) including BTI. It was found that crystallization of HfO 2 causes significant degradation in electron mobility and PBTI, whereas the impacts on hole mobility and NBTI are negligible. The SRPES measurement revealed that the crystallization temperature depends on HfO 2 thickness. We also found that the IFL thickness is the dominant factor for both electron mobility and PBTI. Therefore, a careful optimization of the HfO2/IFL bi-layer is indispensable. We proposed a novel technique for controlling the bi-layer thickness and demonstrated dual metal CMOS devices with high mobility and high reliability even by a post high-k process lower than 500°C for the very first time.
AB - The impacts of interfacial layer (IFL) thickness and crystallinity of HfO2/IFL bi-layer on electrical properties were clarified using synchrotron radiation photoemission spectroscopy (SRPES) and electrical measurements of nFETs (HfSix/HfO2) and pFETs (Ru/HfO 2) including BTI. It was found that crystallization of HfO 2 causes significant degradation in electron mobility and PBTI, whereas the impacts on hole mobility and NBTI are negligible. The SRPES measurement revealed that the crystallization temperature depends on HfO 2 thickness. We also found that the IFL thickness is the dominant factor for both electron mobility and PBTI. Therefore, a careful optimization of the HfO2/IFL bi-layer is indispensable. We proposed a novel technique for controlling the bi-layer thickness and demonstrated dual metal CMOS devices with high mobility and high reliability even by a post high-k process lower than 500°C for the very first time.
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U2 - 10.1109/VTSA.2007.378913
DO - 10.1109/VTSA.2007.378913
M3 - Conference contribution
AN - SCOPUS:34548842757
SN - 1424405858
SN - 9781424405855
T3 - International Symposium on VLSI Technology, Systems, and Applications, Proceedings
BT - 2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Proceedings of Technical Papers
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA
Y2 - 23 April 2007 through 25 April 2007
ER -