High-performance and damage-free neutral beam etching for advanced ULSI devices

Research output: Contribution to conferencePaperpeer-review

Abstract

A novel 50 nm-width MOS gate etching process was established using a newly developed neutral beam etching system by optimizing the gas chemistry and the electrode bias condition. In a comparison of poly-Si gate etching using either SF6 or Cl2 gas chemistries, opposite etching characteristics were observed in the pattern profile. Consequently, the use of a mixture of these gases was proposed in order to achieve fine control of the etching profiles. The energy of the neutral beam was increased by applying a 600 kHz RF bias to the bottom electrode. The RF bias was very effective in increasing the etch rate and the anisotropy of the poly-Si gates, with no deterioration of the neutralization efficiency. The oxide leakage current achieved for a MOS capacitor etched by the neutral beam was one order of magnitude lower than that achieved by conventional plasma etching.

Original languageEnglish
Pages542-547
Number of pages6
Publication statusPublished - 2004 Dec 1
Event2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004 - Beijing, China
Duration: 2004 Oct 182004 Oct 21

Other

Other2004 7th International Conference on Solid-State and Integrated Circuits Technology Proceedings, ICSICT 2004
CountryChina
CityBeijing
Period04/10/1804/10/21

ASJC Scopus subject areas

  • Engineering(all)

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