High performance 50 nm PMOSFET using decaborane (B10H14) ion implantation and 2-step activation annealing process

Ken ichi Goto, Jiro Matsuo, Yoko Tada, Tetsu Tanaka, Youichi Momiyama, Toshihiro Sugii, Isao Yamada

Research output: Contribution to journalConference article

53 Citations (Scopus)

Abstract

A high performance 50 nm PMOSFET with 7-nm-deep ultra shallow junction is described. Ultra-low energy implantation of B10H14 + at 2 keV (effective energy of boron is 0.2 keV) which never causes transient enhanced diffusion (TED) is utilized for the extension formation. To prevent thermal diffusion (TD), we developed a 2-step activation annealing process (2-step AAP) which forms a shallow extension with a low temperature annealing after the deep source/drain (S/D) formation. The highest drive current of 0.40 mA/um ( Ioff of 1 nA/um and Vd = -1.8 V) which improves 15% as compared with published data is achieved. The smallest PMOSFET with a Leff of 38 nm is demonstrated for the first time. A low S/D series resistance Rsd of 760 ohm-urn is achieved even if using a high sheet resistance (>20 Kohm/sq) for the extension regions due to the diminished extension length.

Original languageEnglish
Pages (from-to)471-474
Number of pages4
JournalTechnical Digest - International Electron Devices Meeting, IEDM
Publication statusPublished - 1997 Dec 1
Externally publishedYes
Event1997 International Electron Devices Meeting - Washington, DC, USA
Duration: 1997 Dec 71997 Dec 10

ASJC Scopus subject areas

  • Engineering(all)

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