High-density through silicon vias for 3-D LSIs

Mitsumasa Koyanagi, Takafumi Fukushima, Tetsu Tanaka

Research output: Contribution to journalArticlepeer-review

253 Citations (Scopus)

Abstract

High density through silicon via (TSV) is a key in fabricating three-dimensional (3-D) large-scale integration (LSI). We have developed polycrystalline silicon (poly-Si) TSV technology and tungsten (W)/poly-Si TSV technology for 3-D integration. In the poly-Si TSV formation, low-pressure chemical vapor deposition poly-Si heavily doped with phosphorus was conformally deposited into the narrow and deep trench formed in a Si substrate after the surface of Si trench was thermally oxidized. In the W/poly-Si TSV formation, tungsten was deposited into the Si trench by atomic layer deposition method after the poly-Si deposition, where poly-Si was used as a liner layer for W deposition. The 3-D microprocessor test chip, 3-D memory test chip, 3-D image sensor chip, and 3-D artificial retina chip were successfully fabricated by using poly-Si TSV.

Original languageEnglish
Article number4796288
Pages (from-to)49-60
Number of pages12
JournalProceedings of the IEEE
Volume97
Issue number1
DOIs
Publication statusPublished - 2009

Keywords

  • 3-D system-in-package (SiP)
  • Microbump
  • Three-dimensional (3-D) large-scale integration (LSI)
  • Through silicon via (TSV)
  • Wafer bonding
  • Wafer thinning

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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