Holistic system scaling and integration is the next frontier of Moore's law scaling. Here, we describe the recent trend of 3DIC stacking one component of this approach, and then, introduce the heterogeneous integration approach being developed at UCLA. In the CHIPS consortium, we scale the system by eliminating the package and integrating bare dies directly on Si substrates we call the Silicon Interconnect Fabric (Si-IF). Finally, we describe a novel method for the new flexible device integration FlexTrateTM to integrate heterogeneous dielets on flexible substrates with high-density interconnects by adapting Wafer-Level Fan-Out to flexible substrates.
|Number of pages||5|
|Publication status||Published - 2017 Mar 1|
ASJC Scopus subject areas
- Electrical and Electronic Engineering