Heterogeneous 3D integration for internet of things

Mitsumasa Koyanagi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

To overcome various concerns caused by scaling-down the device size in future LSIs, it is indispensable to introduce a new concept of heterogeneous 3D integration in which various kinds of device chips with different size, different devices and different materials are vertically stacked. To achieve such heterogeneous 3D integration, a key technology of self-assembly and electrostatic (SAE) bonding has been developed. Exploring new devices for the IoT, we have fabricated several kinds of heterogeneous 3D LSIs called super-chip by stacking compound semiconductor device chip, photonic device chip and spintronic device chip on CMOS device chips using SAE bonding.

Original languageEnglish
Title of host publicationProceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014
EditorsJia Zhou, Ting-Ao Tang
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479932962
DOIs
Publication statusPublished - 2014 Jan 23
Event2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014 - Guilin, China
Duration: 2014 Oct 282014 Oct 31

Publication series

NameProceedings - 2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014

Other

Other2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2014
CountryChina
CityGuilin
Period14/10/2814/10/31

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Computer Science Applications

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