Heated ion implantation for high-performance and highly reliable silicon-on-insulator complementary metal-oxide-silicon fin field-effect transistors

Wataru Mizubayashi, Hiroshi Onoda, Yoshiki Nakashima, Yuki Ishikawa, Takashi Matsukawa, Kazuhiko Endo, Yongxun Liu, Shinichi O'uchi, Junichi Tsukada, Hiromi Yamauchi, Shinji Migita, Yukinori Morita, Hiroyuki Ota, Meishoku Masahara

Research output: Contribution to journalArticlepeer-review

4 Citations (Scopus)

Abstract

We have investigated the impact of heated ion implantation (I/I) on the performance and reliability of silicon-on-insulator (SOI) complementary metal-oxide-silicon (CMOS) fin field-effect transistors (FinFETs). An implantation temperature equal to and higher than 400 °C is needed to maintain the crystallinity of the Si substrate during I/I within the experimental conditions of ion species, implantation energy, and ion dose in this study. By heated I/I at 500 °C, the 11-nm-thick SOI layer perfectly maintains the crystallinity even after I/I, and a defect-free crystal is obtained by activation annealing. It was clarified that the cap layer is essential for the suppression of the out-diffusion during heated I/I. Heated I/I on the source and drain improves the on-current-off-current (Ion-Ioff), threshold voltage (Vth) variability, and bias temperature instability (BTI) characteristics of nMOS and pMOS FinFETs as compared with those after room-temperature I/I.

Original languageEnglish
Article number04DA06
JournalJapanese journal of applied physics
Volume54
Issue number4
DOIs
Publication statusPublished - 2015 Apr 1
Externally publishedYes

ASJC Scopus subject areas

  • Engineering(all)
  • Physics and Astronomy(all)

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