Hardware-software co-design for efficient and scalable real-time emulation of SNNs on the edge

Josep Angel Oltra-Oltra, Bernardo Vallejo, Jordi Madrenas, Diana Mata-Hernandez, Mireya Zapata, Shigeo Sato

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper introduces a novel workflow for Distributed Spiking Neural Network Architecture (DSNA). As such, the hardware implementation of Single Instruction Multiple Data (SIMD)-based Spiking Neural Network (SNN) requires the development of user-friendly and efficient toolchain in order to maximise the potential that the architecture brings. By using a novel SNN architecture, a custom designed hardware/software toolchain has been developed. The toolchain performance has been experimentally checked on a Band-Pass Filter (BPF), obtaining optimized code and data.

Original languageEnglish
Title of host publication2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728192017
DOIs
Publication statusPublished - 2021
Event53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Daegu, Korea, Republic of
Duration: 2021 May 222021 May 28

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2021-May
ISSN (Print)0271-4310

Conference

Conference53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021
Country/TerritoryKorea, Republic of
CityDaegu
Period21/5/2221/5/28

Keywords

  • Edge Computing
  • HEENS
  • Hardware-Software Integration
  • Neural Computing
  • SNAVA
  • SNN
  • Spiking Neural Networks

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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