TY - JOUR
T1 - Gate-tuned negative differential resistance observed at room temperature in an array of gold nanoparticles
AU - Huong, Tran Thi Thu
AU - Matsumoto, Kazuhiko
AU - Moriya, Masataka
AU - Shimada, Hiroshi
AU - Kimura, Yasuo
AU - Hirano-Iwata, Ayumi
AU - Mizugaki, Yoshinao
N1 - Funding Information:
This work was partly supported by JSPS KAKENHI Grant Number 15K13999 and by CREST, JST.
Publisher Copyright:
© 2017, Springer-Verlag Berlin Heidelberg.
PY - 2017/4/1
Y1 - 2017/4/1
N2 - We fabricated a single-electron (SE) device using gold nanoparticles (Au NPs). Drain, source, and gate electrodes on a SiO2/Si substrate were formed using electron beam lithography (EBL) and thermal evaporation of Au. Subsequently, solutions of 3-nm-diameter and 5-nm-diameter Au NPs were dropped on the device to make current paths through Au NPs among the electrodes. Measurements of the device exhibited negative differential resistance (NDR) in the current–voltage characteristics between the drain and source electrodes at room temperature (298 K). The NDR behavior was tuned by applying a gate voltage.
AB - We fabricated a single-electron (SE) device using gold nanoparticles (Au NPs). Drain, source, and gate electrodes on a SiO2/Si substrate were formed using electron beam lithography (EBL) and thermal evaporation of Au. Subsequently, solutions of 3-nm-diameter and 5-nm-diameter Au NPs were dropped on the device to make current paths through Au NPs among the electrodes. Measurements of the device exhibited negative differential resistance (NDR) in the current–voltage characteristics between the drain and source electrodes at room temperature (298 K). The NDR behavior was tuned by applying a gate voltage.
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U2 - 10.1007/s00339-017-0891-8
DO - 10.1007/s00339-017-0891-8
M3 - Article
AN - SCOPUS:85016328097
VL - 123
JO - Applied Physics A: Materials Science and Processing
JF - Applied Physics A: Materials Science and Processing
SN - 0947-8396
IS - 4
M1 - 268
ER -