GATE-ARRAY LAYOUT SYSTEM: LOP-ARP2.

Gotaro Odawara, Satoshi Tadokoro, Hiroshi Masaki, Kazuhiko Iijima

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

This paper describes a gate-array layout system, LOP-ARP2, as a subsystem of Packaging Automation System (PAS), which is a total design system for digital circuits. A new placement technique is proposed: Hierarchical Force Directed Technique considering Circuit Structure, which has been proved to be efficient to large scale gate-arrays.

Original languageEnglish
Pages (from-to)921-932
Number of pages12
JournalJournal of the Faculty of Engineering, University of Tokyo, Series B
Volume37
Issue number4
Publication statusPublished - 1984 Sep 1
Externally publishedYes

ASJC Scopus subject areas

  • Engineering(all)

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