GA-based design of multiplierless 2-D state-space digital filters with very small roundoff noise

This paper presents a GA-based design method for multiplierless 2-D state-space digital filters (SSDFs) with very small roundoff noise. All coefficients of the designed 2-D SSDFs are expressed as the sum of two powers-of-two terms. Consequently, the multiplierless 2-D SSDFs are attractive for the high-speed operation and simplification of hardware, since the signal in the filters can be processed by fewer shifting operations and additions instead of multiplications. The proposed method can design multiplierless 2-D SSDFs without significantly increasing the roundoff noise power gain and with smaller approximation error than those of the other methods which use transfer functions in a continuous coefficient space. The effectiveness of the proposed method is demonstrated with a design example.