Abstract
A vector-quantization (VQ) processor system has been developed aiming at real-time compression of motion pictures using a 0.6-μm triple-metal CMOS technology. The chip employs a fully parallel single-instruction, multiple-data architecture having a two-stage pipeline. Each pipeline segment consists of 19 cycles, thus enabling the execution of a single VQ operation in only 19 clock cycles. As a result, it has become possible to encode a full-color picture of 640 × 480 pixels in less than 33 ms, i.e., the real-time compression of moving pictures has become available. The chip is scalable up to eight-chip master-slave configuration in conducting fully parallel search for 2-K template vectors. The chip operates at 17 MHz with a power dissipation of 0.29 W under a power-supply voltage of 3.3 V.
Original language | English |
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Pages (from-to) | 822-830 |
Number of pages | 9 |
Journal | IEEE Journal of Solid-State Circuits |
Volume | 34 |
Issue number | 6 |
DOIs | |
Publication status | Published - 1999 |
Externally published | Yes |
ASJC Scopus subject areas
- Electrical and Electronic Engineering