FPGA-based acceleration of word2vec using OpenCL

Taisuke Ono, Tomoki Shoji, Hasitha Muthumala Waidyasooriya, Masanori Hariyama, Yuichiro Aoki, Yuki Kondoh, Yaoko Nakagawa

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Word2vec is a word embedding method that converts words into vectors in such a way that the semantically and syntactically relevant words are close to each other in the vector space. The processing time of Word2vec is very large due to the huge data size. We propose a power efficient FPGA-based accelerator designed using OpenCL. We achieved 13.4 times speed-up compared to single-core CPU implementation with only 53W of power consumption. The proposed FPGA-based accelerator has the highest power-efficiency compared to existing top-end GPU-based accelerators.

Original languageEnglish
Title of host publication2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728103976
DOIs
Publication statusPublished - 2019 Jan 1
Event2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Sapporo, Japan
Duration: 2019 May 262019 May 29

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2019-May
ISSN (Print)0271-4310

Conference

Conference2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
CountryJapan
CitySapporo
Period19/5/2619/5/29

Keywords

  • FPGA
  • Machine learning
  • Natural language processing
  • Word embedding

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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