Formal Design of Galois-Field Arithmetic Circuits Based on Polynomial Ring Representation

Rei Ueno, Naofumi Homma, Yukihiro Sugawara, Takafumi Aoki

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

Abstract

This paper presents a graph-based approach to designing arithmetic circuits over Galois fields (GFs) based on a polynomial ring (PR) representation, which is a redundant representation for GF arithmetic. The proposed method extends a graph-based circuit description, called a Galois-field arithmetic circuit graph (GF-ACG), which was originally proposed for no redundant GF arithmetic. First, the extension of a GF-ACG is applied to the design and verification of the PR-based GFarithmetic circuits. Then the efficiency of the proposed method is demonstrated using the design and verification of PR-based GF multipliers. In addition, GF(28) inversion circuits with differentGF representations are designed and evaluated in order to confirm the significance of the PR representation.

Original languageEnglish
Title of host publicationProceedings - 2015 IEEE 45th International Symposium on Multiple-Valued Logic, ISMVL 2015
PublisherIEEE Computer Society
Pages48-53
Number of pages6
ISBN (Electronic)9781479917778
DOIs
Publication statusPublished - 2015 Sep 2
Event45th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2015 - Waterloo, Canada
Duration: 2015 May 182015 May 20

Publication series

NameProceedings of The International Symposium on Multiple-Valued Logic
Volume2015-September
ISSN (Print)0195-623X

Other

Other45th IEEE International Symposium on Multiple-Valued Logic, ISMVL 2015
CountryCanada
CityWaterloo
Period15/5/1815/5/20

Keywords

  • GF(28) inversion
  • Galois field
  • arithmetic circuits
  • computer algebra
  • formal verification
  • polynomial ring

ASJC Scopus subject areas

  • Computer Science(all)
  • Mathematics(all)

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