Floating capacitor load readout operation for small, low power consumption and high S/N Ratio CMOS image sensors

Shunichi Wakashima, Fumiaki Kusuhara, Rihito Kuroda, Shigetoshi Sugawa

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

Floating capacitor load readout operation for small, low power consumption and high S/N ratio CMOS image sensors and its effects are demonstrated. This readout operation utilizes a floating capacitor load instead of a constant current load as pixel SF driver, and the parasitic capacitor of pixel output vertical signal line as column sample/hold capacitor. Using a 0.18 μm CMOS image sensor technology, two CMOS image sensors were fabricated to verify the effects. The ratio of pixel area to the total effective area is over 92 %. The power consumption for pixel signal readout and pixel readout noise were decreased by over 97 % and 63.8 %, respectively. Also a higher readout gain and a wider linear response range were obtained. Furthermore, it was confirmed that this readout operation becomes more advantageous when decreasing the power supply voltage, which is favorable for ultra-low power sensor network system applications.

Original languageEnglish
Pages (from-to)99-108
Number of pages10
JournalITE Transactions on Media Technology and Applications
Volume4
Issue number2
DOIs
Publication statusPublished - 2016 Jan 1

Keywords

  • CMOS image sensor
  • Floating capacitor load readout operation
  • Low noise
  • Low power consumption
  • RTN
  • Small chip size

ASJC Scopus subject areas

  • Signal Processing
  • Media Technology
  • Computer Graphics and Computer-Aided Design

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