FeRAM retention analysis method based on memory cell read signal voltage measurement

H. Koike, K. Amanuma, T. Miwa, J. Yamada, H. Toyoshima

Research output: Contribution to conferencePaperpeer-review

4 Citations (Scopus)

Abstract

A novel retention analysis method for ferroelectric random access memory (FeRAM) has been developed, in which read signal voltages from memory cells are measured. It employs on-chip sample/hold circuits, an off-chip A/D converter, and memory LSI testing equipment. FeRAM chip reliability is estimated on the basis of FeRAM read signal voltages after retention periods of 1 day and longer. When used as a tool to estimate long-term data retention in FeRAM chips, and when used to analyze fluctuations in FeRAM cell characteristics, this method can be of significant help in improving the reliability of FeRAM chips.

Original languageEnglish
Pages37-41
Number of pages5
Publication statusPublished - 2001 Jan 1
Externally publishedYes
EventICMTS 2001. 2001 International Conference on Microelectronic Test Structures - Kobe, Japan
Duration: 2001 Mar 192001 Mar 22

Other

OtherICMTS 2001. 2001 International Conference on Microelectronic Test Structures
CountryJapan
CityKobe
Period01/3/1901/3/22

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Fingerprint Dive into the research topics of 'FeRAM retention analysis method based on memory cell read signal voltage measurement'. Together they form a unique fingerprint.

Cite this