FeRAM retention analysis method based on memory cell read signal voltage measurement

Hiroki Koike, Kazushi Amanuma, Tohru Miwa, Junichi Yamada, Hideo Toyoshima

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

A retention analysis method for ferroelectric random access memory (FeRAM) was developed, in which read signal voltages from memory cells are measured. The method uses on-chip sample/hold circuits, an off-chip A/D converter, and memory largescale integration testing equipment. FeRAM chip retention lifetime can be estimated on the basis of FeRAM read signal voltages after retention periods of one day and up. When used as a tool to estimate long-term data retention in FeRAM chips and to analyze fluctuations in memory cell characteristics, this method can provide useful information about FeRAM reliability.

Original languageEnglish
Pages (from-to)201-208
Number of pages8
JournalIEEE Transactions on Semiconductor Manufacturing
Volume15
Issue number2
DOIs
Publication statusPublished - 2002 May 1
Externally publishedYes

Keywords

  • A/D converter
  • FeRAM
  • Ferroelectric
  • Memory
  • Reliability
  • Retention
  • Sample/hold circuit
  • Test

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering

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